Patents by Inventor Shigeyuki Sakura
Shigeyuki Sakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9562808Abstract: A light receiving circuit includes a light receiving element, a first transistor that includes a control terminal which is connected to the light receiving element through a first node, a first terminal and a second terminal, a first load circuit that is connected between a power supply potential and a second node connected to the second terminal, and outputs a voltage signal to a third node, wherein the voltage signal is based on a current signal in the light receiving element, a first feedback resistor that is connected between the first node and the third node, a first limiter circuit that is connected in parallel with the first feedback resistor, and limits an increase of voltage at both ends of the first feedback resistor, and a first circuit that is connected between the second node and the reference potential, includes a second transistor which is diode-connected.Type: GrantFiled: February 27, 2015Date of Patent: February 7, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Sugizaki, Shigeyuki Sakura, Toyoaki Uo
-
Patent number: 9537567Abstract: A light receiving circuit includes an inverting amplification circuit, a first light receiving element, a first circuit, and a charging circuit. The inverting amplification circuit includes an input terminal and an output terminal. The first light receiving element is connected between the input terminal and a reference potential terminal. The first circuit includes a first resistor, a second resistor, a third resistor and a capacitor. The first resistor second resistor connected through a connection point. The first resistor is connected between the input terminal and the connection point, and the second resistor connected between the output terminal and the connection point. The third resistor is connected between the connection point and connection node, and the capacitor is connected between the connection node and the reference potential terminal. The charging circuit connected between the power supply terminal and the connection node.Type: GrantFiled: February 27, 2015Date of Patent: January 3, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Suzunaga, Shigeyuki Sakura
-
Publication number: 20160268982Abstract: According to an embodiment, a light receiving circuit includes a light receiving element, a first MOS transistor of a first conductivity type that has a first gate electrode connected to the light receiving element, a first source electrode connected to a reference potential line, and a first drain electrode connected to a first load circuit at a first node, and operates in a saturation region, a second MOS transistor of a second conductivity type that has a second gate electrode connected to the first node, a second source electrode connected to an output terminal, and a second drain electrode connected to the reference voltage terminal, a second load circuit connected between a power supply terminal and the second source electrode, and a feedback resistor element connected between the first gate electrode and the output terminal.Type: ApplicationFiled: August 17, 2015Publication date: September 15, 2016Inventors: Masayuki SUGIZAKI, Shigeyuki SAKURA
-
Patent number: 9285269Abstract: A light receiving circuit includes first, second, and third resistors, a photodiode that is connected in series with the first resistor between first and second potential lines, and a first MOS transistor of a first conductivity type having a source connected to a second node, a drain connected to an output, and a gate connected to a first node that is between the first resistor and the photodiode. The light receiving circuit also includes a capacitor which is connected in parallel to the second resistor between the first potential line and the second node. The third resistor is connected between the output and the second potential line.Type: GrantFiled: February 7, 2014Date of Patent: March 15, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Sugizaki, Shigeyuki Sakura
-
Publication number: 20160061658Abstract: A light receiving circuit includes a light receiving element, a first transistor that includes a control terminal which is connected to the light receiving element through a first node, a first terminal and a second terminal, a first load circuit that is connected between a power supply potential and a second node connected to the second terminal, and outputs a voltage signal to a third node, wherein the voltage signal is based on a current signal in the light receiving element, a first feedback resistor that is connected between the first node and the third node, a first limiter circuit that is connected in parallel with the first feedback resistor, and limits an increase of voltage at both ends of the first feedback resistor, and a first circuit that is connected between the second node and the reference potential, includes a second transistor which is diode-connected.Type: ApplicationFiled: February 27, 2015Publication date: March 3, 2016Inventors: Masayuki SUGIZAKI, Shigeyuki SAKURA, Toyoaki UO
-
Publication number: 20160065150Abstract: A light receiving circuit includes an inverting amplification circuit, a first light receiving element, a first circuit, and a charging circuit. The inverting amplification circuit includes an input terminal and an output terminal. The first light receiving element is connected between the input terminal and a reference potential terminal. The first circuit includes a first resistor, a second resistor, a third resistor and a capacitor. The first resistor second resistor connected through a connection point. The first resistor is connected between the input terminal and the connection point, and the second resistor connected between the output terminal and the connection point. The third resistor is connected between the connection point and connection node, and the capacitor is connected between the connection node and the reference potential terminal. The charging circuit connected between the power supply terminal and the connection node.Type: ApplicationFiled: February 27, 2015Publication date: March 3, 2016Inventors: Hiroshi SUZUNAGA, Shigeyuki SAKURA
-
Publication number: 20160035928Abstract: According to one embodiment, a photodiode includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the first conductivity type, and a film. The second semiconductor layer is provided in the first semiconductor layer. The third semiconductor layer is provided in the first semiconductor layer so as to surround the second semiconductor layer. Each of one ends of the second and third semiconductor layers is located at an upper surface of the first semiconductor layer. The first to third semiconductor layers include first to third impurity concentrations respectively. The second and third impurity concentrations are higher than the first impurity concentration. The film is provided above the third semiconductor layer, and blocks light to enter into a neighborhood of the third semiconductor layer.Type: ApplicationFiled: October 15, 2015Publication date: February 4, 2016Inventors: Yuichi Tagami, Shigeyuki Sakura
-
Patent number: 9190550Abstract: According to one embodiment, a photodiode includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the first conductivity type, and a film. The second semiconductor layer is provided in the first semiconductor layer. The third semiconductor layer is provided in the first semiconductor layer so as to surround the second semiconductor layer. Each of one ends of the second and third semiconductor layers is located at an upper surface of the first semiconductor layer. The first to third semiconductor layers include first to third impurity concentrations respectively. The second and third impurity concentrations are higher than the first impurity concentration. The film is provided above the third semiconductor layer, and blocks light to enter into a neighborhood of the third semiconductor layer.Type: GrantFiled: January 28, 2014Date of Patent: November 17, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yuichi Tagami, Shigeyuki Sakura
-
Patent number: 9166069Abstract: According to an embodiment, a light-receiving circuit includes a MOSFET, a first light-receiving element and a second light-receiving element. The first light-receiving element controls a state of the MOSFET between ON state and OFF state by applying a voltage induced by a light signal between a gate of the MOSFET and a source of the MOSFET; and a second light-receiving element controls a threshold voltage of the MOSFET.Type: GrantFiled: August 31, 2012Date of Patent: October 20, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Sugizaki, Shigeyuki Sakura, Miki Hidaka, Hiroshi Shimomura
-
Patent number: 9159848Abstract: According to one embodiment, a light receiving circuit includes a light receiving element, a differential circuit, a fifth transistor, and first and second current sources. The differential circuit includes an amplifier and a bias circuit. The amplifier includes a first transistor, a second transistor, and a first feedback resistor. The amplifier is configured to convert a current from the light receiving element into a voltage. The bias circuit includes a third transistor, a fourth transistor, and a second feedback resistor. A reference voltage is supplied to a control electrode of the fourth transistor. The second and third transistors are included in a current mirror circuit. A fifth transistor has a control electrode connected to a connection point between the first and second transistors. A voltage signal switched to a high level or a low level according to a change of an optical signal is outputted.Type: GrantFiled: September 10, 2013Date of Patent: October 13, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Miki Hidaka, Shigeyuki Sakura, Masayuki Sugizaki
-
Patent number: 9153708Abstract: A light receiving circuit includes a light receiving element, a transimpedance amplifier, a delay circuit and a comparator. The transimpedance amplifier is configured to convert the current signal into a first voltage. The comparator includes first to third current control elements each including first to third electrodes and configured to control current of the third electrode by voltage of the second electrode. The first voltage is inputted to the second electrode of the first current control element. Output voltage of the delay circuit is inputted to the second electrode of the second current control element. A second voltage is inputted to the second electrode of the third current control element. The comparator is configured to compare output current of the first current control element with sum of output current of the second current control element and output current of the third current control element.Type: GrantFiled: September 10, 2013Date of Patent: October 6, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hisami Saito, Masayuki Sugizaki, Shigeyuki Sakura
-
Publication number: 20150076525Abstract: A light receiving element includes: a semiconductor layer; a first layer; and a second layer. The semiconductor layer has a first impurity concentration. The first layer of a first conductivity type is provided inward from an upper surface of the semiconductor layer. The first layer has a second impurity concentration higher than the first impurity concentration. The first layer has a surface region on an upper surface of the semiconductor layer side and an inner region being narrower than the first region. The second layer of a second conductivity type is provided inward from the upper surface of the first semiconductor layer. The second layer has a third impurity concentration higher than the first impurity concentration.Type: ApplicationFiled: March 10, 2014Publication date: March 19, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Miki Hidaka, Toyoaki Uo, Shigeyuki Sakura
-
Publication number: 20150069566Abstract: According to one embodiment, a photodiode includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the first conductivity type, and a film. The second semiconductor layer is provided in the first semiconductor layer. The third semiconductor layer is provided in the first semiconductor layer so as to surround the second semiconductor layer. Each of one ends of the second and third semiconductor layers is located at an upper surface of the first semiconductor layer. The first to third semiconductor layers include first to third impurity concentrations respectively. The second and third impurity concentrations are higher than the first impurity concentration. The film is provided above the third semiconductor layer, and blocks light to enter into a neighborhood of the third semiconductor layer.Type: ApplicationFiled: January 28, 2014Publication date: March 12, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yuichi Tagami, Shigeyuki Sakura
-
Publication number: 20150001380Abstract: A light receiving circuit includes first, second, and third resistors, a photodiode that is connected in series with the first resistor between first and second potential lines, and a first MOS transistor of a first conductivity type having a source connected to a second node, a drain connected to an output, and a gate connected to a first node that is between the first resistor and the photodiode. The light receiving circuit also includes a capacitor which is connected in parallel to the second resistor between the first potential line and the second node. The third resistor is connected between the output and the second potential line.Type: ApplicationFiled: February 7, 2014Publication date: January 1, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masayuki SUGIZAKI, Shigeyuki SAKURA
-
Patent number: 8884208Abstract: According to one embodiment, a light receiving circuit having a trans-impedance amplifier and an output circuit is provided. The trans-impedance amplifier includes a photodiode, a feedback resistor and a first transistor having a channel of a first conductive type. The photodiode converts an optical signal into an electrical signal. Ends of the feedback resistor are connected respectively to the photodiode and a node. A gate of the first transistor receives the electrical signal from the photodiode. A signal corresponding to a signal from a drain of the first transistor is output to the node. The output circuit includes a second transistor having a channel of the first conductive type, and generates an output signal from a drain of the second transistor. A gate of the second transistor is connected to the node.Type: GrantFiled: March 19, 2012Date of Patent: November 11, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Shigeyuki Sakura
-
Patent number: 8847140Abstract: A light receiving circuit includes a photodiode, a transimpedance amp having a feedback resistor, an electric current comparator and an automatic threshold control circuit that includes a current mirror circuit for forming a current according to the mirror effect. With this light receiving circuit, regardless of how powerful the input light signal is, low pulse width distortion characteristics can be achieved.Type: GrantFiled: September 6, 2012Date of Patent: September 30, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Sugizaki, Shigeyuki Sakura
-
Publication number: 20140284459Abstract: According to one embodiment, a light receiving circuit includes a light receiving element, a differential circuit, a fifth transistor, and first and second current sources. The differential circuit includes an amplifier and a bias circuit. The amplifier includes a first transistor, a second transistor, and a first feedback resistor. The amplifier is configured to convert a current from the light receiving element into a voltage. The bias circuit includes a third transistor, a fourth transistor, and a second feedback resistor. A reference voltage is supplied to a control electrode of the fourth transistor. The second and third transistors are included in a current mirror circuit. A fifth transistor has a control electrode connected to a connection point between the first and second transistors. A voltage signal switched to a high level or a low level according to a change of an optical signal is outputted.Type: ApplicationFiled: September 10, 2013Publication date: September 25, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Miki Hidaka, Shigeyuki Sakura, Masayuki Sugizaki
-
Publication number: 20140284458Abstract: A light receiving circuit includes a light receiving element, a transimpedance amplifier, a delay circuit and a comparator. The transimpedance amplifier is configured to convert the current signal into a first voltage. The comparator includes first to third current control elements each including first to third electrodes and configured to control current of the third electrode by voltage of the second electrode. The first voltage is inputted to the second electrode of the first current control element. Output voltage of the delay circuit is inputted to the second electrode of the second current control element. A second voltage is inputted to the second electrode of the third current control element. The comparator is configured to compare output current of the first current control element with sum of output current of the second current control element and output current of the third current control element.Type: ApplicationFiled: September 10, 2013Publication date: September 25, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hisami Saito, Masayuki Sugizaki, Shigeyuki Sakura
-
Patent number: 8791442Abstract: According to one embodiment, an optical coupling device is provided. A first photodiode receives an optical signal generated by a light emitting element and converts the optical signal into a first electrical signal. A first inverting amplifier is provided with a first feedback resistor and a first operating amplifier connected in parallel with each other. The input end is connected to a cathode of the first photodiode. A first signal which is obtained by inverting the first electrical signal is output from the output end. A second inverting amplifier is provided with a second feedback resistor and a second operating amplifier connected in parallel with each other. The input end of the second inverting amplifier is connected to a cathode of a second photodiode. The second inverting amplifier outputs a second signal from the output end. A comparator receives the first and second signals and outputs a comparison amplified signal.Type: GrantFiled: March 5, 2012Date of Patent: July 29, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Miki Hidaka, Shigeyuki Sakura
-
Patent number: 8754628Abstract: According to one embodiment, a voltage regulator includes an output transistor, a voltage detector, a controller, and a discharge circuit. The output transistor is connected between a power supply terminal and an output terminal. The voltage detector is connected between the output terminal and a ground terminal. The voltage detector is configured to divide an output voltage between the output terminal and the ground terminal according to an inputted voltage switching signal and generates a first voltage on the ground terminal side and a second voltage having a polarity the same as a polarity of the first voltage and having an absolute value lower than or equal to an absolute value of the first voltage. The controller is configured to detect a difference between the first voltage and a reference voltage and control the output transistor.Type: GrantFiled: September 16, 2011Date of Patent: June 17, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Atsushi Namai, Kei Kasai, Shigeyuki Sakura