Patents by Inventor Shigeyuki Yamakita

Shigeyuki Yamakita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11862978
    Abstract: The power conditioner determines possible total power and working individual power to be in a range that possible individual power of each of the power supply units is not exceeded. The possible total power is determined from the possible individual power, of each of the power supply units, determined based on the battery information detected by each of the unit controllers, collected by a master controller from each of the unit controllers. The working individual power is determined based on a power deviation indicating a difference of charging and discharging power between the power supply units. The power conditioner causes charging and discharging of each of the power supply units within the calculated working individual power.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: January 2, 2024
    Assignees: PANASONIC ENERGY CO., LTD., PANASONIC HOLDINGS CORPORATION
    Inventors: Tohru Watanabe, Takashi Iida, Shinya Nishikawa, Kazufumi Nishikawa, Shigeyuki Yamakita
  • Publication number: 20200303929
    Abstract: The power conditioner determines possible total power and working individual power to be in a range that possible individual power of each of the power supply units is not exceeded. The possible total power is determined from the possible individual power, of each of the power supply units, determined based on the battery information detected by each of the unit controllers, collected by a master controller from each of the unit controllers. The working individual power is determined based on a power deviation indicating a difference of charging and discharging power between the power supply units. The power conditioner causes charging and discharging of each of the power supply units within the calculated working individual power.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 24, 2020
    Applicants: SANYO Electric Co., Ltd., Panasonic Corporation
    Inventors: Tohru Watanabe, Takashi Iida, Shinya Nishikawa, Kazufumi Nishikawa, Shigeyuki Yamakita
  • Publication number: 20110273145
    Abstract: A challenge to be met by an aspect of the present invention is to provide a charge control circuit that prevents occurrence of a decrease in battery capacity even when a battery stays in a connection with an external power supply and that induces neither battery deterioration nor overcharge. A first switch (2) is connected to a point among an external power supply (60), a load (80), and a secondary battery (70). When the secondary battery (70) is charged with the external power supply (60), the first switch (2) is turned on. When the secondary battery (70) has accomplished full charge, the first switch 82) is turned off. Electric discharge from the secondary battery (70) to the load (80) is shut off at full charge of the secondary battery (70), so that a load current fed from the secondary battery (70) does not flow and, hence, a decrease in battery capacity of the secondary battery (70) which would be caused by the load (80) does not take place.
    Type: Application
    Filed: November 26, 2009
    Publication date: November 10, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Shigeyuki Yamakita, Toshinori Fukasawa
  • Patent number: 6411138
    Abstract: A drain current of an FET (4) is controlled to control an output of a buzzer (11), and a gate voltage of the FET (4) is controlled by an operational amplifier (3) for changing a source output of the FET (4) into an inverted input. By such a negative feedback circuit structure, a path for controlling a buzzer output is set to be one system and stability of the buzzer output can be enhanced. A variable power supply (2) for changing an output in accordance with control data of a logic section (1) is set to be a non-inverted input of the operational amplifier (3). Consequently, it is possible to obtain a circuit structure which does not depend on the number of bits of the control data.
    Type: Grant
    Filed: February 8, 2001
    Date of Patent: June 25, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigeyuki Yamakita, Hirotsugu Matsuura, Manabu Matsuo
  • Publication number: 20010020856
    Abstract: A drain current of an FET (4) is controlled to control an output of a buzzer (11), and a gate voltage of the FET (4) is controlled by an operational amplifier (3) for changing a source output of the FET (4) into an inverted input. By such a negative feedback circuit structure, a path for controlling a buzzer output is set to be one system and stability of the buzzer output can be enhanced. A variable power supply (2) for changing an output in accordance with control data of a logic section (1) is set to be a non-inverted input of the operational amplifier (3). Consequently, it is possible to obtain a circuit structure which does not depend on the number of bits of the control data.
    Type: Application
    Filed: February 8, 2001
    Publication date: September 13, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigeyuki Yamakita, Hirotsugu Matsuura, Manabu Matsuo