Abstract: Monolithic power stage (Pstage) packages and methods for using same are provided that may be implemented to provide lower thermal resistance/enhanced thermal performance, reduced noise, and/or smaller package footprint than conventional monolithic Pstage packages. The conductive pads of the disclosed Pstage packages may be provided with a larger surface area for contacting respective conductive layers of a mated PCB to provide a more effective and increased heat transfer away from a monolithic Pstage package. In one example, the increased heat transfer away from the monolithic Pstage package results in lower monolithic Pstage package operating temperature and increased power output.

Abstract: A voltage regulator system of an information handling system includes a voltage regulator and a voltage regulator controller. The voltage regulator includes multiple power-stages (Pstages). The voltage regulator controller communicates with the voltage regulator. The voltage regulator controller monitors for a first fault signal on a first pin of a circuit associated with a first Pstage of the Pstages. In response to a first voltage of the first fault signal at the first pin being greater than a threshold voltage, the voltage regulator controller monitors a second pin of the circuit for a second fault signal and determines whether a voltage of the second fault signal at the second pin is equal to a second voltage. Based on the voltage of the second fault signal being equal to the second voltage, the voltage regulator controller determines a first fault has occurred in the first Pstage.

Abstract: A trans-inductor voltage regulator (TLVR) includes at least two voltage converter phases configured to receive a common input voltage and to provide an output voltage on an output of the voltage converter, an associated coupled inductor, and a compensation inductor. Each coupled inductor includes a primary winding magnetically coupled to a secondary winding. For each primary winding, a first terminal is coupled to the output of the associated voltage converter, and a second terminal of the primary winding is coupled to a load. A first terminal of the compensation inductor is coupled to a ground plane, and each secondary winding is coupled in series with the compensation inductor, with a last secondary being coupled to the ground plane. The compensation inductor is a nonlinear inductor exhibiting a first inductance level at a first current level, and a second inductance level different from the first inductance level at a second current level different from the first current level.

Abstract: A trans-inductor voltage regulator (TLVR) includes at least two voltage converter phases configured to receive a common input voltage and to provide an output voltage on an output of the voltage converter, an associated coupled inductor, and a compensation inductor. Each coupled inductor includes a primary winding magnetically coupled to a secondary winding. For each primary winding, a first terminal is coupled to the output of the associated voltage converter, and a second terminal of the primary winding is coupled to a load. A first terminal of the compensation inductor is coupled to a ground plane, and each secondary winding is coupled in series with the compensation inductor, with a last secondary being coupled to the ground plane. The compensation inductor is a nonlinear inductor exhibiting a first inductance level at a first current level, and a second inductance level different from the first inductance level at a second current level different from the first current level.

Abstract: Monolithic power stage (Pstage) packages and methods for using same are provided that may be implemented to provide lower thermal resistance/enhanced thermal performance, reduced noise, and/or smaller package footprint than conventional monolithic Pstage packages. The conductive pads of the disclosed Pstage packages may be provided with a larger surface area for contacting respective conductive layers of a mated PCB to provide a more effective and increased heat transfer away from a monolithic Pstage package. In one example, the increased heat transfer away from the monolithic Pstage package results in lower monolithic Pstage package operating temperature and increased power output.

Abstract: A power stage includes a power converter having high- and low-side switches, a driver circuit that drives the switching power converter based upon a PWM signal, and a current sensing circuit that detects a low-side current level on the low-side switch, and provides a current level signal that includes the low-side current level. The power stage turns on the low-side switch at a first time, and estimates a first low-side current level at the first time. In estimating the first low-side current level, the power stage detects a second low-side current level at a second time while the low-side switch is turned on, the second time being after the first time, and detects a third low-side current level at a third time while the low-side switch is turned on, wherein the third time is after the second time. The first low-side current level is estimated based upon the second and third low-side current levels.

Abstract: A power stage includes a power converter having high- and low-side switches, a driver circuit that drives the switching power converter based upon a PWM signal, and a current sensing circuit that detects a low-side current level on the low-side switch, and provides a current level signal that includes the low-side current level. The power stage turns on the low-side switch at a first time, and estimates a first low-side current level at the first time. In estimating the first low-side current level, the power stage detects a second low-side current level at a second time while the low-side switch is turned on, the second time being after the first time, and detects a third low-side current level at a third time while the low-side switch is turned on, wherein the third time is after the second time. The first low-side current level is estimated based upon the second and third low-side current levels.

Abstract: An memory subsystem of an information handling system includes a memory module and a controller. The memory module includes a Registering Clock Driver (RCD) configured to receive a clock signal. The RCD includes a delay setting and a clock delay circuit to provide a selectable delayed clock signal based upon the delay setting. The memory module further includes a power management integrated circuit (PMIC) with a plurality of switching regulators. The PMIC receives the delayed clock signal and clocks the switching regulators based upon the delayed clock signal. The controller sets the first delay setting.

Abstract: An memory subsystem of an information handling system includes a memory module and a controller. The memory module includes a Registering Clock Driver (RCD) configured to receive a clock signal. The RCD includes a delay setting and a clock delay circuit to provide a selectable delayed clock signal based upon the delay setting. The memory module further includes a power management integrated circuit (PMIC) with a plurality of switching regulators. The PMIC receives the delayed clock signal and clocks the switching regulators based upon the delayed clock signal. The controller sets the first delay setting.

Abstract: A method may include operating a power system coupled to at least one information handling resource, configured to provide electrical energy to the at least one information handling resource, and comprising a plurality of voltage regulator phases, in a plurality of operational modes, each mode defining a number of the plurality of voltage regulator phases operating in a fully-enabled mode and whether or not one of the plurality of voltage regulator phases operates in a light-load mode, selecting a selected operational mode from the plurality of operational modes based on a load requirement of the at least one information handling resource, and controlling the plurality of voltage regulator phases to deliver an aggregate current in accordance with the load requirement and the selected operational mode.

Abstract: Embodiments of a power stage with vertical integration for high-density, low-noise voltage regulators are described. In some embodiments, an Information Handling System (IHS) may include: a processor; and a multi-phase voltage regulator (VR) coupled to the processor, where the multi-phase VR comprises at least one power stage, and where the at least one power stage includes: a High-Side Field-Effect Transistor (HSFET) die mounted on a leadframe; a Low-Side FET (LSFET) die mounted on the leadframe; at least one decoupling capacitor mounted on the leadframe; and a driver circuit mounted on a clip, where the clip overlays at least a portion of the HSFET die and the LSFET die.

Abstract: An information handling system includes a voltage regulator control circuit having a programming resistor input pin for receiving an input from a programming resistor and an ammeter input for receiving a current value. A power source provides power to a load circuit coupled to the power source via a non-remote-sensing power connection. In accordance with at least one embodiment, the voltage regulator control circuit assures a reliable input to an overvoltage protection circuit of the voltage regulator control circuit regardless of states of connections of the load circuit to the power source.

Abstract: Systems and methods for adaptive modulation of MOSFET driver key parameters for improved voltage regulator efficiency and reliability in a voltage regulator may include a power stage. The power stage may include a high side switch including a high side gate, a peak voltage detection circuit, and a high side driver strength modulator circuit. The high side driver strength modulator circuit may determine a high side driver strength level. The high side driver strength modulator circuit may also connect a subset of the set of high side gate drivers to the high side gate based on the high side driver strength level. The high side driver strength modulator circuit may also disconnect a remaining subset of the set of high side gate drivers from the high side gate.

Abstract: Systems and methods for individual phase temperature monitoring and balance control in a multi-phase voltage regulator may include a plurality of smart power stages including a first smart power stage and a second smart power stage and a voltage regulator controller. The voltage regulator controller may send a first control signal to the first smart power stage to enable the first smart power stage to send a first temperature of the first smart power stage to the voltage regulator controller during a first phase of a switching cycle. The voltage regulator controller may also determine that the first temperature received by the voltage regulator controller corresponds to the first smart power stage based on the first control signal. The voltage regulator controller may further send a second control signal to the second smart power stage to enable the second smart power stage to send a second temperature to the voltage regulator controller during a second phase.

Abstract: A computer-implemented method enables determining an input power load for a multi voltage rail subsystem in an electronic device such as an information handing system. The method comprises determining a first output power value from a first voltage regulator and a second output power value from a second voltage regulator. A first input power value to the first voltage regulator is determined based at least partially on the first output power value and a second input power value to the second voltage regulator is determined based at least partially on the second output power value. An offset power value is calculated based on the first input power value and the second input power value. A total input power value is calculated based on the offset power value and a third input power value. The total input power value is transmitted to a processor.

Abstract: A method, a power control system, and an information handling system (IHS) for operating voltage regulators (VRs) in an IHS. The method includes detecting, via a VR controller, a real time current level of a processor and receiving a first temperature value from a temperature sensor. The VR controller calculates a modified current level based on the real time current level, the first temperature value and a pre-defined temperature value and applies the modified current level to the processor.

Abstract: An information handling system includes a voltage regulator control circuit having a programming resistor input pin for receiving an input from a programming resistor and an ammeter input for receiving a current value. A power source provides power to a load circuit coupled to the power source via a non-remote-sensing power connection. In accordance with at least one embodiment, the voltage regulator control circuit assures a reliable input to an overvoltage protection circuit of the voltage regulator control circuit regardless of states of connections of the load circuit to the power source.

Abstract: A multiphase voltage regulator (VR) has a VR controller that performs automatic VR phase assignment and configuration for single or multi-output rails of an Information Handling System (IHS). VR power circuit has power stages selectably coupled to output voltage connection(s) or rail(s) that deliver electrical energy to information handling resource(s). VR controller is coupled to the VR power circuit and provides a first reference voltage (IREF) signal to the VR power circuit. VR controller identifies any power stages that return a load current monitor (IMON) signal that indicates that the respective power stage is coupled to the first IREF signal. VR controller regulates identified power stages of the VR power circuit during delivery of electrical power to information handling resource(s). Regulation is according to a VR configuration that is selected based on identified VR phases assigned to a first output voltage loop and associated with the first IREF signal.

Abstract: A method may include operating a power system coupled to at least one information handling resource, configured to provide electrical energy to the at least one information handling resource, and comprising a plurality of voltage regulator phases, in a plurality of operational modes, each mode defining a number of the plurality of voltage regulator phases operating in a fully-enabled mode and whether or not one of the plurality of voltage regulator phases operates in a light-load mode, selecting a selected operational mode from the plurality of operational modes based on a load requirement of the at least one information handling resource, and controlling the plurality of voltage regulator phases to deliver an aggregate current in accordance with the load requirement and the selected operational mode.

Abstract: Systems and methods for adaptive modulation of MOSFET driver key parameters for improved voltage regulator efficiency and reliability in a voltage regulator may include a power stage. The power stage may include a high side switch including a high side gate, a peak voltage detection circuit, and a high side driver strength modulator circuit. The high side driver strength modulator circuit may determine a high side driver strength level. The high side driver strength modulator circuit may also connect a subset of the set of high side gate drivers to the high side gate based on the high side driver strength level. The high side driver strength modulator circuit may also disconnect a remaining subset of the set of high side gate drivers from the high side gate.