Patents by Inventor Shih-An Lin

Shih-An Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145020
    Abstract: A circuit for testing a memory is provided. An input end of the memory is coupled to a register, and the circuit for testing the memory transmits data to the memory through the register. The circuit for testing the memory performs the following operations sequentially: writing a first data into a target address of the memory, all bits of the target address being at the same level, and all bits of the first data being at the same level; writing a second data to the target address of the memory, all bits of the second data being at the same level, and the second data being different from the first data; reading from the target address an output data; and determining whether the output data is correct.
    Type: Application
    Filed: August 22, 2023
    Publication date: May 2, 2024
    Inventors: SHENG-LIN LIN, SHIH-CHIEH LIN
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20240136183
    Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20240134147
    Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion used for connecting an optical element, a fixed portion, and a driving assembly used for driving the movable portion to move relative to the fixed portion. The movable portion is movable relative to the fixed portion.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 25, 2024
    Inventors: Po-Xiang ZHUANG, Chen-Hung CHAO, Wei-Jhe SHEN, Shou-Jen LIU, Kun-Shih LIN, Yi-Ho CHEN
  • Patent number: 11965698
    Abstract: A slim heat-dissipation module is provided. The slim heat-dissipation module includes a first plate, a second plate, a first porous structure, a second porous structure, a first fluid, and a second fluid. The second plate is combined with the first plate to form a first type chamber and a second type chamber, wherein the first type chamber and the second type chamber are sealed and independent, respectively. The first porous structure is disposed in the first type chamber. The second porous structure is disposed in the second type chamber. The first fluid is disposed in the first type chamber. The second fluid is disposed in the second type chamber.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Shih-Lin Huang, Ting-Yuan Wu
  • Patent number: 11968817
    Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jui-Lin Chen, Chao-Yuan Chang, Ping-Wei Wang, Fu-Kai Yang, Ting Fang, I-Wen Wu, Shih-Hao Lin
  • Patent number: 11967168
    Abstract: A method and device of fingerprint image generation for saving memory. The method includes generating a first fingerprint image of an original data size according to a plurality of first analog sensing signals which are read from a fingerprint sensor array before an exposure period ends. Then the first fingerprint image represented by a first data size which is equivalent to or smaller than the original data size is stored. a second fingerprint image of the original data size is generated after generating the first fingerprint image of the original data size according to a plurality of second analog sensing signals which are read from the fingerprint sensor array during the exposure period. The second fingerprint image represented by a compressed data size smaller than the original data size is then stored.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: April 23, 2024
    Assignee: Novatek Microelectronics Corp.
    Inventors: Weilun Shih, Wu-Wei Lin
  • Publication number: 20240128987
    Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.
    Type: Application
    Filed: November 28, 2022
    Publication date: April 18, 2024
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Shih-Jia Zeng, Yi-Fang Chang, Chun-Wei Tsao, Chen-An Hsu, Wei Lin
  • Patent number: 11961796
    Abstract: A package comprises at least one first device die, and a redistribution line (RDL) structure having the at least one first device die bonded thereto. The RDL structure comprises a plurality of dielectric layers, and a plurality of RDLs formed through the plurality of dielectric layers. A trench is defined proximate to axial edges of the RDL structure through each of the plurality of dielectric layers. The trench prevents damage to portions of the RDL structure located axially inwards of the trench.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yueh-Ting Lin, Hua-Wei Tseng, Ming Shih Yeh, Der-Chyang Yeh
  • Patent number: 11962328
    Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: April 16, 2024
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Shih-Jia Zeng, Yi-Fang Chang, Chun-Wei Tsao, Chen-An Hsu, Wei Lin
  • Publication number: 20240118491
    Abstract: A photonic semiconductor device including a light-emitting component and a photonic integrated circuit is provided. The light-emitting component at least includes a gain medium layer, a first contact layer and a first optical coupling layer stacked to each other. The photonic integrated circuit includes a second optical coupling layer. The light-emitting component and the photonic integrated circuit are stacked in a stacking direction, the first optical coupling layer has a first taper portion, the second optical coupling layer has a second taper portion, and the first taper portion and the second taper portion overlap in the stacking direction. Accordingly, the light emitted from the gain medium layer may be transmitted to the second taper portion from the first taper portion by optical coupling in a short length of an optical coupling path.
    Type: Application
    Filed: January 19, 2023
    Publication date: April 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao YU, Jui Lin CHAO, Hsing-Kuo HSIA, Shih-Peng TAI, Kuo-Chung YEE
  • Patent number: 11947153
    Abstract: A backlight module and a display device are provided, and the backlight module includes a light guide plate, a plurality of light-emitting components, and a frame. The light guide plate includes a first side, a second side, and two third sides. The light-emitting components are disposed on the first side, and light generated from the light-emitting components enters the light guide plate from the first side. The frame covers the second side and the third sides and includes an opening and at least one buffer portion. The light-emitting components are disposed in the opening, and the buffer portion is disposed on a side of the opening and contacts the light guide plate.
    Type: Grant
    Filed: May 4, 2023
    Date of Patent: April 2, 2024
    Assignee: Radiant Opto-Electronics Corporation
    Inventors: Hung-Pin Cheng, Shih-Fan Liu, Chien-Yu Ko, Jui-Lin Chen
  • Publication number: 20240104285
    Abstract: A method is provided and includes several operations: arranging multiple channels extending in a first direction; arranging, in accordance with multiple weights of multiple macros, a first portion of the macro closer to a centroid of a core region of an integrated circuit than a second portion of the macros; and arranging the macros on opposite sides of the channels. The macros have multiple pins coupled to the channels interposed between the macros.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Yi-Lin CHUANG, Shi-Wen TAN, Song LIU, Shih-Yao LIN, Wen-Yuan FANG
  • Publication number: 20240103218
    Abstract: Optical devices and methods of manufacture are presented in which a laser die or other heterogeneous device is embedded within an optical device and evanescently coupled to other devices. The evanescent coupling can be performed either from the laser die to a waveguide, to an external cavity, to an external coupler, or to an interposer substrate.
    Type: Application
    Filed: January 12, 2023
    Publication date: March 28, 2024
    Inventors: Hsing-Kuo Hsia, Jui Lin Chao, Chen-Hua Yu, Chih-Hao Yu, Shih-Peng Tai
  • Publication number: 20240096630
    Abstract: Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion of the gate stack and the first metal cap layer while leaving a sidewall portion of the first metal cap layer that extends along a sidewall of the first dielectric cap layer; forming a second metal cap layer over the gate stack and the first metal cap layer wherein a sidewall portion of the second metal cap layer extends further along a sidewall of the first dielectric cap layer; forming a second dielectric cap layer over the second metal cap layer; and flattening a top layer of the first dielectric cap layer and the second dielectric cap layer using planarization operations.
    Type: Application
    Filed: January 12, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Yu-Shih Wang, Jih-Sheng Yang, Shih-Chieh Chao, Yih-Ann Lin, Ryan Chia-Jen Chen
  • Publication number: 20240094498
    Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion used for connecting an optical element, a fixed portion, and a driving assembly used for driving the movable portion to move relative to the fixed portion. The movable portion is movable relative to the fixed portion.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 21, 2024
    Inventors: Po-Xiang ZHUANG, Chen-Hung CHAO, Wei-Jhe SHEN, Shou-Jen LIU, Kun-Shih LIN, Yi-Ho CHEN
  • Patent number: 11935758
    Abstract: A method for atomic layer etching a metal containing layer is provided. At least a region of a surface of the metal containing layer is modified to form a modified metal containing region by exposing a surface of the metal containing layer to a modification gas, wherein adjacent to the modified metal containing region remains an unmodified metal containing region. The modified metal containing region is selectively removed with respect to the unmodified metal containing region by exposing the surface of the metal containing layer to an inert bombardment plasma generated from an inert gas.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: March 19, 2024
    Assignee: Lam Research Corporation
    Inventors: Wenbing Yang, Mohand Brouri, Samantha SiamHwa Tan, Shih-Ked Lee, Yiwen Fan, Wook Choi, Tamal Mukherjee, Ran Lin, Yang Pan
  • Patent number: 11935611
    Abstract: The present invention discloses a memory test circuit having repair information maintaining mechanism. A repairing control circuit controls a MBISR circuit to perform a self-repair procedure on a memory circuit and includes a remapping storage circuit and a latch storage circuit. The remapping storage circuit receives and stores repairing information generated by the MBISR circuit after the self-repair procedure finishes. The latch storage circuit is electrically coupled between the remapping storage circuit and a remapping circuit corresponding to the memory circuit to receive and store the repairing information from the remapping storage circuit such that the remapping circuit accesses the repairing information therefrom when a scan test is performed on the remapping storage circuit based on a scan chain to perform remapping and repairing on the memory circuit based on the repairing information and a redundant structure of the memory circuit.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: March 19, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Sheng-Lin Lin, Shih-Chieh Lin
  • Publication number: 20240089607
    Abstract: An image sensing device and a control device of an illumination device thereof are provided. The control device includes a control circuit, an operation circuit, and multiple driving signal generators. The control circuit generates multiple control signals. The operation circuit performs a logical operation on the control signals and an image capturing signal to generate multiple operation results. The driving signal generator respectively provides multiple driving signals to the illumination device according to the operation results, and the driving signals respectively have multiple different output powers.
    Type: Application
    Filed: May 29, 2023
    Publication date: March 14, 2024
    Applicant: HTC Corporation
    Inventors: Chao Shuan Huang, Sheng-Long Wu, Yu-Jui Hsu, Shih-Yao Tsai, Tun-Hao Chao, Sen-Lin Chung, Chih Pin Chung, Chih-Yuan Chien, Shih Hong Sun
  • Patent number: D1024932
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: April 30, 2024
    Assignee: WALSIN LIHWA CORPORATION
    Inventors: Ko-Ming Chen, Shih-Hsiang Wang, An-Hung Lin, Min-Chuan Wu, Shao-Pei Lin, Chien-Chung Ni, Chun-Ying Lin