Patents by Inventor Shih-An Yu

Shih-An Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250006557
    Abstract: An exemplary device includes a frontside power rail disposed over a frontside of a substrate, a backside power rail disposed over a backside of the substrate, an epitaxial source/drain structure disposed between the frontside power rail and the backside power rail. The epitaxial source/drain structure is connected to the frontside power rail by a frontside source/drain contact. The epitaxial source/drain structure is connected to the backside power rail by a backside source/drain via. The backside source/drain via is disposed in a substrate, and a dielectric layer is disposed between the substrate and the backside power rail. The backside source/drain via extends through the dielectric layer and the substrate.
    Type: Application
    Filed: November 30, 2023
    Publication date: January 2, 2025
    Inventors: Po-Yu Huang, Shih-Chieh Wu, I-Wen Wu, Chen-Ming Lee, Mei-Yun Wang
  • Publication number: 20250006807
    Abstract: A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.
    Type: Application
    Filed: September 16, 2024
    Publication date: January 2, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Chuan Chiu, Huan-Chieh Su, Pei-Yu Wang, Cheng-Chi Chuang, Chun-Yuan Chen, Li-Zhen Yu, Chia-Hao Chang, Yu-Ming Lin, Chih-Hao Wang
  • Publication number: 20250004176
    Abstract: An optical component includes a substrate and a low reflection layer. The low reflection layer is disposed on a surface of the substrate, and the low reflection layer includes a plurality of nanoparticles. The nanoparticles are arranged in a stack configuration, and the number of the nanoparticles decreases progressively in a direction away from the substrate, such that an effective refractive index of the low reflection layer decreases progressively in the direction away from the substrate so as to prevent total reflection of light at the interface, thereby reducing reflectivity. When specific conditions are satisfied, the stacked nanoparticles can form a gradient-index film layer, and the low reflection layer can provide better anti-reflection capability.
    Type: Application
    Filed: April 16, 2024
    Publication date: January 2, 2025
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Shih-Jung HSU, Chen Wei FAN, Wen-Yu TSAI, Ming-Ta CHOU
  • Publication number: 20250005894
    Abstract: Feature descriptor matching is reformulated into a graph-matching problem. Keypoints from a query image and a reference image are initially matched and filtered based on the match. For a given keypoint, a feature graph is constructed based on neighboring keypoints surrounding the given keypoint. The feature graph is compared to a corresponding feature graph of a reference image for the matched keypoint. Relocalization data is obtained based on the comparison.
    Type: Application
    Filed: September 16, 2024
    Publication date: January 2, 2025
    Inventors: Chen Huang, Seyed Hesameddin Najafi Shoushtari, Frankie Lu, Shih-Yu Sun, Joshua M. Susskind
  • Patent number: 12178870
    Abstract: The present disclosure relates to a chimeric influenza virus hemagglutinin (HA) polypeptide, comprising one or more stem domain sequence, each having at least 60% homology with a stem domain consensus sequence of H1 subtype HA (H1 HA) and/or H5 subtype HA (H5 HA), fused with one or more globular head domain sequence, each having at least 60% homology with a globular head domain consensus sequence of H1 subtype HA (H1 HA) or H5 subtype HA (H5 HA).
    Type: Grant
    Filed: May 13, 2024
    Date of Patent: December 31, 2024
    Assignee: Academia Sinica
    Inventors: Chi-Huey Wong, Hsin-Yu Liao, Shih-Chi Wang, Yi-An Ko, Kuo-I Lin, Che Ma, Ting-Jen Cheng
  • Patent number: 12180576
    Abstract: A physical vapor deposition (PVD) target for performing a PVD process is provided. The PVD target includes a backing plate and a target plate coupled to the backing plate. The target plate includes a sputtering source material and a dopant, with the proviso that the dopant is not impurities in the sputtering source material. The sputtering source material includes a diffusion barrier material.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: December 31, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Hsi Wang, Yen-Yu Chen, Yi-Chih Chen, Shih-Wei Bih
  • Publication number: 20240427076
    Abstract: An electronic device includes a light guide plate, a back plate, a plurality of light sources, an optical film and a buffer member. The back plate accommodates the light guide plate and includes a bottom plate, a side plate, a bending portion and a first notch portion, wherein a side of the bending portion and a side of the bottom plate are respectively connected to opposite sides of the side plate, the bending portion is overlapped with the bottom plate, the first notch portion is adjacent to the bending portion, and the first notch portion is overlapped with the bottom plate. The light sources are disposed between the bottom plate and the bending portion. The optical film is disposed on the light guide plate and is separated from the bending portion. The buffer member is overlapped with the first notch portion and the light guide plate.
    Type: Application
    Filed: September 3, 2024
    Publication date: December 26, 2024
    Inventors: Shih-Ching HSU, Hsin-Hung CHEN, Chia-Yu CHUNG
  • Publication number: 20240427067
    Abstract: Provided is a filter, including a substrate layer and a near-infrared absorption layer on the substrate layer, wherein the near-infrared absorption layer includes a copper complex formed from a copper compound for supplying copper ion, phosphonric acid represented by formula 1 herein, and at least one phosphorus-containing compound represented by formulas 2 to 4 herein, wherein the OD value of the filter for the incident light wavelength from 930-950 nm is greater than 4. In the present disclosure, by setting a specific near-infrared absorption layer on the filter, the filter is able to efficiently absorb near-infrared and exhibit excellent visible light transmittance, and the burden of film post-processing can be reduced.
    Type: Application
    Filed: June 14, 2024
    Publication date: December 26, 2024
    Applicant: PLATINUM OPTICS TECHNOLOGY INC.
    Inventors: Shih-Song Cheng, Bo-Xun Zhu, Jia-Cheng Chang, Kuan-Yu Chen, Hung-Han Duan, Shi-Lin Zhang, Bo-En Zhu
  • Publication number: 20240425709
    Abstract: Provided is an ultraviolet-absorbing resin composition, including 35 to 45 wt % of a fluorocarbon resin, 5 to 25 wt % of an isocyanate curing agent, 1 to 5 wt % of an ultraviolet absorbent, and a residual solvent accounting for the balance, based on the total weight of the ultraviolet-absorbing resin composition. Provided is also an ultraviolet-absorbing resin, an ultraviolet-absorbing structure including the same, and the method for preparing the same. The present disclosure obtains an ultraviolet-absorbing resin with a specific composition from a specific resin composition formula, and the ultraviolet-absorbing resin efficiently absorbs ultraviolet and has excellent visible light transmittance, as well as high stability.
    Type: Application
    Filed: June 14, 2024
    Publication date: December 26, 2024
    Applicant: PLATINUM OPTICS TECHNOLOGY INC.
    Inventors: Shih-Song Cheng, Hung-Han Duan, Bo-Xun Zhu, Jia-Cheng Chang, Kuan-Yu Chen, Shi-Lin Zhang
  • Publication number: 20240429310
    Abstract: A semiconductor device may include a electrostatic discharge (ESD) protection circuit and a high voltage ESD triggering circuit that is configured to trigger ESD protection for high voltage circuits of the semiconductor device. The high voltage ESD triggering circuit may be implemented by one or more of the example implementations of high voltage ESD triggering circuits described herein. The example implementations of high voltage ESD triggering circuits described herein are capable of handle high voltages of the high voltage circuits included in the semiconductor device. This reduces the likelihood of and/or prevents premature triggering of ESD protection during normal operation for these high voltage circuits, and enables the high voltage circuits to be protected from high voltage ESD events.
    Type: Application
    Filed: June 21, 2023
    Publication date: December 26, 2024
    Inventors: Sheng-Fu HSU, Shih-Fan CHEN, Chen-Yi LEE, Pin-Chen CHEN, Lin-Yu HUANG
  • Patent number: 12174405
    Abstract: An optical structure is provided. The optical structure includes a sensor, a bandpass filter and a plurality of protrusions. The bandpass filter is disposed above the sensor. The protrusions are disposed on the bandpass filter. The bandpass filter allows light with a wavelength of 700 nm to 3,000 nm to pass through. The protrusions have a size distribution that controls the phase of the incident light to be between 0 and 2?.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: December 24, 2024
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Chin-Chuan Hsieh, Kuo-Feng Lin, Shih-Yu Ho
  • Patent number: 12176829
    Abstract: A micromechanical arm array is provided. The micromechanical arm array comprises: a plurality of micromechanical arms spaced from each other in a first horizontal direction and extending in a second horizontal direction, wherein each micromechanical arm comprises a protrusion at a top of each micromechanical arm and protruding upwardly in a vertical direction; a plurality of protection films, each protection film encapsulating one of the plurality of micromechanical arms; and a metal connection structure extending in the first horizontal direction. The metal connection structure comprises: a plurality of joint portions, each joint portion corresponding to and surrounding the protrusion of one of the plurality of micromechanical arms; and a plurality of connection portions extending in the first horizontal direction and connecting two neighboring joint portions.
    Type: Grant
    Filed: August 3, 2023
    Date of Patent: December 24, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yu Liao, Tsai-Hao Hung
  • Publication number: 20240418910
    Abstract: Provided is a lens module with an integrated structure, including a first lens and a second lens, a first substrate and a second substrate, an optical bonding layer, a first absorption layer and a second absorption layer, wherein the first absorption layer includes a copper complex, which is formed from a copper compound, a phosphonic acid represented by formula 1 herein, and at least one phosphorus-containing compound represented by formulas 2 to 4 herein. Due to the integrated structure, the lens module can be reduced in size. The manufacturing process is simplified because no assembly process is required. The lens module of the present disclosure exhibits high transmittance for visible light and low transmittance for near-infrared, showing an excellent near-infrared cut-off effect. In addition, while the incident light irradiates the lens module at different angles, the transmittance curve only is slightly shifted.
    Type: Application
    Filed: June 14, 2024
    Publication date: December 19, 2024
    Applicant: PLATINUM OPTICS TECHNOLOGY INC.
    Inventors: Shih-Song Cheng, Bo-Xun Zhu, Jia-Cheng Chang, Kuan-Yu Chen, Hung-Han Duan, Shi-Lin Zhang, Chin-Jung Hsu
  • Publication number: 20240417576
    Abstract: Provided are a composite photosensitive element and a method for preparing a composite photosensitive element, and the composite photosensitive element includes a photosensitive element and a near-infrared absorption layer pasted on the photosensitive element, wherein the near-infrared absorption layer includes a copper complex, and the copper complex is formed from a copper compound providing copper ions, phosphoric acid represented by formula 1 herein, and at least one phosphorus-containing compound represented by formulas 2 to 4 herein, wherein the OD value of the near-infrared absorption layer for the incident light wavelength from 930-950 nm is greater than 4. The present disclosure forms a filtering film directly on the photosensitive element instead of using a traditional filter assembly to reduce the size of the assembled product. The filtering film can be further processed and shaped to have functions of micro-lens.
    Type: Application
    Filed: June 14, 2024
    Publication date: December 19, 2024
    Applicant: PLATINUM OPTICS TECHNOLOGY INC.
    Inventors: Shih-Song Cheng, Bo-Xun Zhu, Jia-Cheng Chang, Kuan-Yu Chen, Shi-Lin Zhang, Chin-Lung Chen
  • Publication number: 20240418908
    Abstract: Provided is a filter lens and a method for preparing the filter lens. The filter lens includes a copper complex, wherein the copper complex is formed from a copper compound providing copper ions, phosphoric acid represented by formula 1 herein, and at least one phosphorus-containing compound represented by formulas 2 to 4 herein, wherein the OD value of the filter lens for the incident light wavelength of 930 nm to 950 nm is greater than 4. The present disclosure enables a filter lens to have the function of filtering out near-infrared instead of using a traditional filter component and thus the size of the assembled optical lens module is reduced. The filter lens can further filter out light having other specific wavelengths, and thereby the number of lenses in the assembled optical lens module is reduced.
    Type: Application
    Filed: June 14, 2024
    Publication date: December 19, 2024
    Applicant: PLATINUM OPTICS TECHNOLOGY INC.
    Inventors: Shih-Song Cheng, Bo-Xun Zhu, Jia-Cheng Chang, Kuan-Yu Chen, Hung-Han Duan, Shi-Lin Zhang, Chin-Lung Chen
  • Patent number: 12171091
    Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: December 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20240413223
    Abstract: A method for manufacturing a semiconductor structure includes: forming a channel portion on a fin portion; forming two source/drain portions on the fin portion and at two opposite sides of the channel portion, in which each of the two source/drain portions includes a first semiconductor material that is doped with dopant impurities; and forming two bottom portions each of which is disposed between the fin portion and a corresponding one of the two source/drain portions, in which each of the two bottom portions includes a second semiconductor material that is different from the first semiconductor material and that is capable of trapping the dopant impurities when the dopant impurities in the first semiconductor material diffuse toward the fin portion.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 12, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-En TSAI, Chih-Yu MA, Cheng-Han LEE, Shih-Chieh CHANG, Sheng-Syun WONG
  • Publication number: 20240412985
    Abstract: A substrate cleaning system to remove particulates from multiple substrates includes a cleaning tank for applying a cleaning liquid to substrates, a rinse tank for applying a rinsing liquid to substrates, and a robot system. The cleaning tank includes a stationary lid, an input lid, and an output lid. The input and output lids allow a substrate carrier designed to carry an individual substrate to access an inner volume of the cleaning tank for processing. A transport system moves the substrate in the substrate carrier through the inner volume of the cleaning tank by creating a series of gaps between substrates to allow proper processing. The robot system transports substrates through the input and output lids of the cleaning tank, and transports substrates into the rinse tank.
    Type: Application
    Filed: June 3, 2024
    Publication date: December 12, 2024
    Inventors: Clinton SAKATA, Ricardo MARTINEZ, Robert DUES, Shih-Yu LIU, Tarun Kumar ABICHANDANI, Brian K. KIRKPATRICK, Jagan RANGARAJAN, Adrian S. BLANK, Edward GOLUBOVSKY, Justin H. WONG
  • Publication number: 20240413149
    Abstract: An integrated circuit is provided which includes a first complementary field-effect transistor and a second complementary field-effect transistor. The first complementary field-effect transistor includes at least two first transistors respectively located on a first layer and a second layer. The second complementary field-effect transistor is disposed adjacent to the first complementary field-effect transistor. The second complementary field-effect transistor includes at least two second transistors respectively located on the first layer and the second layer. Type of one of the at least two first transistors located on the first layer is different from type of one of the at least two second transistors located on the first layer.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 12, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Yu HUANG, Wei-Cheng TZENG, Chun-Yen LIN, Shih-Wei PENG, Kuan Yu CHEN, Wei-Cheng LIN, Jiann-Tyng TZENG
  • Publication number: 20240413221
    Abstract: A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.
    Type: Application
    Filed: July 11, 2024
    Publication date: December 12, 2024
    Inventors: Chia-Wei Chen, Chih-Yu Hsu, Hui-Chi Chen, Shan-Mei Liao, Jian-Hao Chen, Cheng-Hao Hou, Huang-Chin Chen, Cheng Hong Yang, Shih-Hao Lin, Tsung-Da Lin, Da-Yuan Lee, Kuo-Feng Yu, Feng-Cheng Yang, Chi On Chui, Yen-Ming Chen