Patents by Inventor Shih-Chang Chu

Shih-Chang Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11954527
    Abstract: A resource allocation method comprises using resources with a used resource quantity of a machine learning system to execute a first experiment which has a first minimum resource demand, receiving an experiment request associated with a target dataset, deciding a second experiment according to the target dataset, deciding a second minimum resource demand of the second experiment, allocating resources with a quantity equal to the second minimum resource demand for an execution of the second experiment when a total resource quantity of the machine learning system meets a sum of the first minimum resource demand and the second minimum resource demand and a difference between the total resource quantity and the used resource quantity meets the second minimum resource demand, determining that the machine learning system has an idle resource, and selectively allocating said the idle resource for at least one of the first experiment and the second experiment.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: April 9, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shih-Chang Chen, Yi-Chin Chu, Yi-Fang Lu
  • Patent number: 11923429
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang
  • Publication number: 20120280919
    Abstract: An electronic paper display apparatus is disclosed. The electronic paper display apparatus includes an electronic paper device and a color filter. The color filter is disposed on the electronic paper device. The color filter includes a filter substrate, a color resist layer and a sensing electrode of a touch panel. The sensing electrode and the color resist layer are formed on different surfaces of the filter substrate, or on the same surface of the filter substrate.
    Type: Application
    Filed: September 22, 2011
    Publication date: November 8, 2012
    Applicant: E INK HOLDINGS INC.
    Inventor: Shih-Chang CHU
  • Patent number: 7898630
    Abstract: A pixel structure is provided. A data line and a scan line are disposed over a substrate. A first, a second, and a third thin film transistors (TFT) are electrically connected with the data line and the scan line respectively. A first width-to-length ratio, a second width-to-length ratio and a third width-to-length ratio of the first, second and third TFTs are the same. An impedance layer and the first TFT are connected in series. A first, a second, and a third pixel electrodes are electrically connected with the first, the second and the third TFTs respectively. A first, a second, and a third common line are disposed below the first, second and third pixel electrodes respectively. The first and second common lines are electrically connected to a first voltage and the third common line is electrically connected to a second voltage.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: March 1, 2011
    Assignee: Au Optronics Corporation
    Inventors: Chun-Chang Chiu, Shih-Chang Chu, Chih-Min Yang
  • Publication number: 20100283057
    Abstract: A pixel structure is provided. A data line and a scan line are disposed over a substrate. A first, a second, and a third thin film transistors (TFT) are electrically connected with the data line and the scan line respectively. A first width-to-length ratio, a second width-to-length ratio and a third width-to-length ratio of the first, second and third TFTs are the same. An impedance layer and the first TFT are connected in series. A first, a second, and a third pixel electrodes are electrically connected with the first, the second and the third TFTs respectively. A first, a second, and a third common line are disposed below the first, second and third pixel electrodes respectively. The first and second common lines are electrically connected to a first voltage and the third common line is electrically connected to a second voltage.
    Type: Application
    Filed: July 20, 2010
    Publication date: November 11, 2010
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chun-Chang Chiu, Shih-Chang Chu, Chih-Min Yang
  • Patent number: 7808476
    Abstract: A pixel structure is provided. A scan line and a data line are disposed over a substrate. A first, second, and third thin film transistors are electrically connected with the data line and the scan line. The width-to-length ratios of the second and third thin film transistors are the same but larger than that of the first thin film transistor. A first, second and third pixel electrodes are electrically connected with the first, the second and the third thin film transistors, respectively. A first, second and third common lines are disposed below the first, second and third pixel electrodes respectively. The first and second common lines are electrically connected to a first voltage and the third common line is electrically connected to a second voltage.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: October 5, 2010
    Assignee: Au Optronics Corporation
    Inventors: Chun-Chang Chiu, Shih-Chang Chu, Chih-Min Yang
  • Publication number: 20100073309
    Abstract: A touch panel and an electronic device thereof are provided. The touch panel includes a film, a substrate and a plurality of dot spacers. The dot spacers are disposed on a surface of the substrate, and the surface faces the film. In addition, the number of/the volume of the dot spacers in each unit size of the substrate progressively decreases from the vertical-axis direction of the center of the substrate to the horizontal axis direction thereof.
    Type: Application
    Filed: December 10, 2008
    Publication date: March 25, 2010
    Applicant: SWENC TECHNOLOGY CO., LTD.
    Inventors: Ming-Hua Yeh, Yi-Cheng Peng, Shih-Chang Chu
  • Publication number: 20100073308
    Abstract: A touch panel and an electronic device thereof are provided. The touch panel includes a film, a substrate and a plurality of dot spacers. The dot spacers are disposed on a surface of the substrate, and the surface faces the film. In addition, the height of the dot spacers in each unit size of the substrate progressively decreases from the vertical-axis direction of the center of the substrate to the horizontal axis direction thereof.
    Type: Application
    Filed: December 9, 2008
    Publication date: March 25, 2010
    Applicant: SWENC Technology Co., Ltd.
    Inventors: Ming-Hua Yeh, Yi-Cheng Peng, Shih-Chang Chu
  • Publication number: 20080079884
    Abstract: A pixel structure is provided. A scan line and a data line are disposed over a substrate. A first, second, and third thin film transistors are electrically connected with the data line and the scan line. The width-to-length ratios of the second and third thin film transistors are the same but larger than that of the first thin film transistor. A first, second and third pixel electrodes are electrically connected with the first, the second and the third thin film transistors, respectively. A first, second and third common lines are disposed below the first, second and third pixel electrodes respectively. The first and second common lines are electrically connected to a first voltage and the third common line is electrically connected to a second voltage.
    Type: Application
    Filed: November 21, 2006
    Publication date: April 3, 2008
    Applicant: QUANTA DISPLAY INC.
    Inventors: Chun-Chang Chiu, Shih-Chang Chu, Chih-Min Yang