Abstract: An embodiment of the present disclosure provides a semiconductor device. The semiconductor device has a first semiconductor structure; a second semiconductor structure on the first semiconductor structure and having a first aluminum content; a plurality of voids in the second semiconductor structure; an active structure between the first semiconductor structure and the second semiconductor structure; and a third semiconductor structure between the active structure and the second semiconductor structure, and having a second aluminum content. The first aluminum content is greater than the second aluminum content.

Abstract: A method for manufacturing a semiconductor device includes: forming a plurality of sacrificial stack portions on a semiconductor substrate, the sacrificial stack portions being spaced apart from each other; forming a metal material layer to cover the sacrificial stack portions, the metal material layer including a first metal and a second metal different from the first metal, the first metal having a reduction potential lower than that of the second metal; and annealing the metal material layer to form a self-forming barrier layer conformally covering the sacrificial stack portions, the self-forming barrier layer including a metal oxide, a metal silicide, or a combination thereof formed from the first metal by annealing.

Abstract: An interconnect structure, along with methods of forming such, are described. The structure includes a dielectric layer, a conductive feature disposed in the dielectric layer, and a conductive layer disposed over the dielectric layer, wherein the conductive layer includes a first portion and a second portion adjacent the first portion. The structure also includes a first barrier layer in contact with the first portion of the conductive layer, a second barrier layer in contact with the second portion of the conductive layer, and a dielectric material disposed between and in contact with the first and second barrier layers, wherein a bottom surface of the second barrier layer and a bottom surface of the dielectric material are substantially co-planar.

Abstract: A semiconductor device, including a base and a semiconductor stack. The semiconductor stack includes a first semiconductor structure located on the base, a second semiconductor structure located on the first semiconductor structure, and an active structure located between the first semiconductor structure and the second semiconductor structure. The active structure includes two confinement layers and a well layer located between the two confinement layers. One of the confinement layers includes Alx1Ga1-x1As, and x1 is equal to or larger than 0.25 and equal to or smaller than 0.4. The well layer includes Inx2Ga1-x2As, and x2 is equal to or larger than 0.25 and equal to or smaller than 0.3. The one of the confinement layers and the well layer respectively have a first thickness in a range of 200 nm to 400 nm and a second thickness in a range of 3 nm to 6 nm.

Abstract: A gait evaluating system including a processor is provided. The processor identifies whether a gait type of the user belongs to a normal gait, a non-neuropathic gait or a neuropathic gait based on step feature values of a user and walking limb feature values of the user. In response to that the gait type of the user belongs to the non-neuropathic gait, the processor controls the display panel to display a first auxiliary information, a second auxiliary information, and a third auxiliary information. The first auxiliary information indicates a potential sarcopenia of the user. The second auxiliary information indicates a dietary guideline for muscle building and muscle strengthening. The third auxiliary information shows a motion instruction video for regaining or maintaining muscle strength of the user.

Abstract: A memory device and a programming method thereof are provided. The programming method includes the following steps. According to a step value, based on an incremental step pulse programming scheme, multiple programming operations are performed for a selected memory page. In a setting mode, multiple program verify operations are respectively performed corresponding to the programming operations to respectively generate multiple pass bit numbers. In the setting mode, a pass bit number difference value of two pass bit numbers corresponding to two programming operations is calculated. In the setting mode, an amount of the step value is adjusted according to the pass bit number difference value.

Abstract: The present disclosure provides a semiconductor light-emitting device and a semiconductor light-emitting component. The semiconductor light-emitting device includes a substrate, a first semiconductor contact layer, a semiconductor light-emitting stack including an active layer, a first-conductivity-type contact structure, a second semiconductor contact layer, a second-conductivity-type contact structure and a first electrode pad. The first-conductivity-type contact structure is electrically connected to the first semiconductor contact layer. The second-conductivity-type contact structure is electrically connected to the second semiconductor contact layer. The first-conductivity-type contact structure has a first bottom surface and a first top surface, and the active layer has a second bottom surface and a second top surface.

Abstract: A semiconductor device is provided, which includes an active region, a first semiconductor layer, a first metal element-containing structure, a first p-type or n-type layer, a second semiconductor layer and an insulating layer. The active region has a first surface and a second surface. The first semiconductor layer is at the first surface. The first metal element-containing structure covers the first semiconductor layer and comprising a first metal element. The first p-type or n-type layer is between the first semiconductor layer and the first metal element-containing structure. The second semiconductor layer is between the first semiconductor layer and the first p-type or n-type layer. The insulating layer covers a portion of the first semiconductor layer and a portion of the second semiconductor. The first p-type or n-type layer includes an oxygen element (O) and a second metal element and has a thickness less than or equal to 20 nm.

Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The active region is located between the first semiconductor structure and the second semiconductor structure. The active region includes a light-emitting region having N pair(s) of semiconductor stack(s). Each of the semiconductor stack includes a well layer and a barrier layer, in which N is a positive integer greater than or equal to 1. The well layer includes a first group III-V semiconductor material including indium with a first percentage of indium content. The barrier layer includes a second group III-V semiconductor material including indium with a second percentage of indium content. The first group III-V semiconductor material and the second group III-V semiconductor material further includes phosphorus. The second percentage of indium content is less than the first percentage of indium content.

Abstract: A semiconductor device is provided, which includes an epitaxial structure, a first contact electrode and a second contact electrode. The epitaxial structure includes a first semiconductor structure, a second semiconductor structure and an active region. The first semiconductor structure includes a first semiconductor contact layer. The second semiconductor structure includes a second semiconductor contact layer. The active region is located between the first semiconductor structure and the second semiconductor structure. The first contact electrode is located on the second semiconductor contact layer and directly contacts the first semiconductor contact layer. The second contact electrode is located on the second semiconductor contact layer and directly contacts the second semiconductor contact layer. The first semiconductor contact layer has a conductivity type of n-type and includes a first group III-V semiconductor material.

Abstract: A semiconductor device is provided, which includes a semiconductor stack and a first contact structure. The semiconductor stack includes an active layer and has a first surface and a second surface. The first contact structure is located on the first surface and includes a first semiconductor layer, a first metal element-containing structure and a first p-type or n-type layer. The first metal element-containing structure includes a first metal element. The first p-type or n-type layer physically contacts the first semiconductor layer and the first metal element-containing structure. The first p-type or n-type layer includes an oxygen element (O) and a second metal element and has a thickness less than or equal to 20 nm, and the first semiconductor layer includes a phosphide compound or an arsenide compound.

Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first dopant. The second semiconductor structure is located on the first semiconductor structure and includes a second dopant different from the first dopant. The active region includes a plurality of semiconductor pairs and located between the first semiconductor structure and the second semiconductor structure. Each semiconductor pair includes a barrier layer and a well layer and includes the first dopant. The active region does not include a nitrogen element. A doping concentration of the first dopant in the first semiconductor structure is higher than a doping concentration of the first dopant in the active region.

Abstract: A photo-detecting device includes a first semiconductor layer, a second semiconductor layer located on the first semiconductor layer, a light-absorbing layer located between the first semiconductor layer and the second semiconductor layer, an insulating layer located on the second semiconductor layer, and an electrode structure located on the insulating layer. The second semiconductor layer includes a first region having a first conductivity-type and a second region having a second conductivity-type different from the first conductivity-type. The first region is surrounded by the second region, and includes a geometric center and an interface between the first region and the second region. The insulating layer covers the first region and the second region. The electrode structure includes an outer sidewall located on the second region. In a top view, the interface is located between the geometric center and the outer sidewall.

Abstract: The present disclosure provides a semiconductor device and a semiconductor component. The semiconductor device includes an active structure, a ring-shaped semiconductor contact layer, a first electrode, and an insulating layer. The active structure has a first-conductivity-type semiconductor layer, a second-conductivity-type semiconductor layer, and an active layer located between the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer. The ring-shaped semiconductor contact layer is located on the second-conductivity-type semiconductor layer and having a first inner sidewall and a first outer sidewall. The first electrode has an upper surface and covers the ring-shaped semiconductor contact layer. The insulating layer covers the first electrode and the active structure and has a second inner sidewall and a second outer sidewall. The first inner sidewall is not flush with the second inner sidewall in a vertical direction.

Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.

Abstract: A photodetector includes a first semiconductor layer, an absorption structure, a second semiconductor layer, and a barrier structure. The absorption structure is located on the first semiconductor layer, and having a first conduction band, a first valence band, and a first band gap. The second semiconductor layer is located on the absorption structure, and having a second conduction band, a second valence band, and a second band gap. The barrier structure is located between the absorption structure and the second semiconductor layer, and having a third conduction band, a third valence band, and a third band gap. The third conduction band is greater than the second conduction band or the third valence band is less than the second valence band.

Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.

Abstract: A semiconductor device comprises a first semiconductor structure, a second semiconductor structure located on the first semiconductor structure, and an active layer located between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure has a first conductivity type, and includes a plurality of first layers and a plurality of second layers alternately stacked. The second semiconductor structure has a second conductivity type opposite to the first conductivity type. The plurality of first layers and the plurality of second layers include indium and phosphorus, and the plurality of first layers and the plurality of second layers respectively have a first indium atomic percentage and a second indium atomic percentage. The second indium atomic percentage is different from the first indium atomic percentage.

Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body having a topmost surface; a first light-emitting device disposed on the carrier body and having a light-emitting surface; and a light-receiving device comprising a group III-V semiconductor material disposed on the carrier body and having a light-receiving surface. The light-emitting surface is separated from the topmost surface by first distant H1, the light-receiving surface is separated from the topmost surface by a second distance H2, and H1 is different from H2.