Patents by Inventor Shih-Chi Hsu

Shih-Chi Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7841853
    Abstract: This invention discloses an injection molding machine and a heat-insulating structure of a barrel thereof. The heat-insulating structure covers the barrel of the injection molding machine. The heat-insulating structure includes a plurality of heat-insulating units and a plurality of heat-resistant interlinings. The heat-insulating units are disposed on an outer surface of the barrel in turn along an axial direction of the barrel. The heat-resistant interlinings are located between the heat-insulating units and connect the heat-insulating units, respectively. Each heat-insulating unit includes a heat-resistant layer, a heat-insulating material layer, and an insulating layer in turn. The heat-resistant layer covers the outer surface of the barrel of the injection molding machine.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: November 30, 2010
    Assignees: Maintek Computer (Suzhou) Co., Ltd., Pegatron Corporation
    Inventors: Chiu-ting Yu, Hsien-chih Wu, Yu-xiu Wu, Bo-tao Jiang, Shih-chi Hsu
  • Publication number: 20100028482
    Abstract: This invention discloses an injection molding machine and a heat-insulating structure of a barrel thereof. The heat-insulating structure covers the barrel of the injection molding machine. The heat-insulating structure includes a plurality of heat-insulating units and a plurality of heat-resistant interlinings. The heat-insulating units are disposed on an outer surface of the barrel in turn along an axial direction of the barrel. The heat-resistant interlinings are located between the heat-insulating units and connect the heat-insulating units, respectively. Each heat-insulating unit includes a heat-resistant layer, a heat-insulating material layer, and an insulating layer in turn. The heat-resistant layer covers the outer surface of the barrel of the injection molding machine.
    Type: Application
    Filed: July 30, 2009
    Publication date: February 4, 2010
    Applicants: Maintek Computer (Suzhou)Co. Ltd., Pegatron Corporation
    Inventors: Chiu-ting Yu, Hsien-chih Wu, Yu-xiu Wu, Bo-tao Jiang, Shih-chi Hsu
  • Patent number: 6221786
    Abstract: This present invention provides methods for isolating interconnects characterized by first isolating the top and bottom interconnects with an IMD consisting of a traditional low-k dielectric material, then dissolving the low-k material with a suitable solvent and using air or a noble gas instead of the traditional low-k dielectric material to isolate the interconnects.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: April 24, 2001
    Assignee: Nanya Technology Corporation
    Inventors: Shih-Chi Hsu, Tse Yao Huang
  • Patent number: 6140179
    Abstract: The present invention discloses a method of forming a crown capacitor for a DRAM cell. An etching method having different selectivity between the BPSG and silicon oxynitride layer is applied to form a sacrificial structure with a concanovenex sidewall. Using the sacrificial structure as a mold, a high capacitance crown capacitor is obtained.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: October 31, 2000
    Assignee: Nanya Technology Corporation
    Inventors: Yinan Chen, Shih-chi Hsu, Tse Yao Huang
  • Patent number: 6133089
    Abstract: A method for fabricating a DRAM capacitor is described. First, a semiconductor substrate having a capacitor contact is provided. Next, a first polysilicon layer is formed. Then, an oxide layer and a silicon oxy-nitride layer are sequentially formed over the first polysilicon layer. Next, the silicon oxy-nitride layer, the oxide layer, and the first polysilicon layer are selectively etched to leave a rectangular stack layer. Afterwards, the oxide layer and the first polysilicon layer of the rectangular stack layer are etched from the sidewall direction to leave a double T-shaped stack layer. Then, second polysilicon layer is formed on the upper surface and the sidewall of the double T-shaped stack layer. Next, the second polysilicon layer is selectively removed. The remaining second and first polysilicon layer are used as the bottom electrode. Afterwards, a dielectric layer and an upper electrode are formed on the bottom electrode.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: October 17, 2000
    Assignee: Nanya Technology Corporation
    Inventors: Tse Yao Huang, Shih-Chi Hsu, Yinan Chen, Hsing-Chuan Tsai