Abstract: An attaching apparatus, an intermediary mechanism thereof, and an attaching method are provided. The intermediary mechanism is provided for being selectively arranged between a pressing mechanism and a carrying mechanism. The intermediary mechanism includes a frame, a deformable sheet fixed on the frame, and an adhesive layer disposed on the deformable sheet. The frame is provided for being fastened to one of the pressing mechanism and the carrying mechanism. The adhesive layer is provided for adhering at least one attaching object onto one side of the deformable sheet facing the carrying mechanism. The deformable sheet is configured to be gradually deformed toward the carrying mechanism by being pressed with the pressing mechanism, so that the at least one attaching object is abutted against an attached object on the carrying mechanism.

Abstract: Batch semiconductor packaging structures with back-deposited shielding layer and manufacturing method are provided. A grid having multiple frames is glued on an adhesive substrate. Multiple semiconductor devices respectively align with corresponding frames and are stuck on the adhesive substrate. Then a metal layer covers the semiconductor devices and the grid. A distance between four peripheries of a bottom of each semiconductor device and the corresponding frame is smaller than a distance between the bottom and the adhesive substrate, so that the a portion of the metal layer extended to the peripheries of the bottom is effectively reduced during forming the metal layer. After the semiconductor devices are picked up, no metal scrap is remined thereon. Therefore, the adhesive substrate does not need to form openings in advance and is reusable. The grid is also reusable so the manufacturing cost of the present invention is decreased.

Abstract: A chip carrier device includes a frame, a chip support and a limiter. The chip support is disposed on the frame, and includes a supporting film for chips to be adhered thereto. A peripheral portion of the supporting film is attached to a surrounding frame part of the frame. A crossing portion of the supporting film passes through a center of the supporting film, and interconnects two opposite points of the peripheral portion. The supporting film is formed with through holes. The limiter includes a limiting part that interconnects two opposite points of the surrounding frame part, that is positioned corresponding to the crossing portion, and that is positioned on one side of the supporting film where the chips are to be arranged.

Abstract: A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.

Abstract: An attaching apparatus, an intermediary mechanism thereof, and an attaching method are provided. The intermediary mechanism is provided for being selectively arranged between a pressing mechanism and a carrying mechanism. The intermediary mechanism includes a frame, a deformable sheet fixed on the frame, and an adhesive layer disposed on the deformable sheet. The frame is provided for being fastened to one of the pressing mechanism and the carrying mechanism. The adhesive layer is provided for adhering at least one attaching object onto one side of the deformable sheet facing the carrying mechanism. The deformable sheet is configured to be gradually deformed toward the carrying mechanism by being pressed with the pressing mechanism, so that the at least one attaching object is abutted against an attached object on the carrying mechanism.

Abstract: A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.

Abstract: Batch semiconductor packaging structures with back-deposited shielding layer and manufacturing method are provided. A grid having multiple frames is glued on an adhesive substrate. Multiple semiconductor devices respectively align with corresponding frames and are stuck on the adhesive substrate. Then a metal layer covers the semiconductor devices and the grid. A distance between four peripheries of a bottom of each semiconductor device and the corresponding frame is smaller than a distance between the bottom and the adhesive substrate, so that the a portion of the metal layer extended to the peripheries of the bottom is effectively reduced during forming the metal layer. After the semiconductor devices are picked up, no metal scrap is remined thereon. Therefore, the adhesive substrate does not need to form openings in advance and is reusable. The grid is also reusable so the manufacturing cost of the present invention is decreased.

Abstract: A chip carrier device includes a frame, a chip support and a limiter. The chip support is disposed on the frame, and includes a supporting film for chips to be adhered thereto. A peripheral portion of the supporting film is attached to a surrounding frame part of the frame. A crossing portion of the supporting film passes through a center of the supporting film, and interconnects two opposite points of the peripheral portion. The supporting film is formed with through holes. The limiter includes a limiting part that interconnects two opposite points of the surrounding frame part, that is positioned corresponding to the crossing portion, and that is positioned on one side of the supporting film where the chips are to be arranged.

Abstract: A method and apparatus can include: providing a cover, the cover including face cover, neck cover, crown cover, side cover, and back cover; creating a cover opening in the cover above the face cover for exposure of facial features of a user from the cover; attaching a helmet cover at an attachment point near the back cover configured to expand around a helmet; and forming a helmet cover opening.

Abstract: A method related to legalize mixed-cell height standard cells of an IC is provided. A global placement of the IC is obtained. A plurality of standard cells of the IC are placed in the global placement. Each standard cell is moved from a position to the nearest row in the global placement. A displacement value of each moved standard cell is obtained in the global placement. The global placement of the IC is divided into a plurality of windows according to the displacement values of the moved standard cells in each window and a dead space corresponding to each moved standard cell in each window. All overlapping areas among the standard cells of each window are removed to obtain a detailed placement. The IC is manufactured according to the detailed placement. The standard cells have different cell heights in each window.

Abstract: A method related to legalize mixed-cell height standard cells of an IC is provided. A global placement of the IC is obtained. A plurality of standard cells of the IC are placed in the global placement. Each standard cell is moved from a position to the nearest row in the global placement. A displacement value of each moved standard cell is obtained in the global placement. The global placement of the IC is divided into a plurality of windows according to the displacement values of the moved standard cells in each window and a dead space corresponding to each moved standard cell in each window. All overlapping areas among the standard cells of each window are removed to obtain a detailed placement. The IC is manufactured according to the detailed placement. The standard cells have different cell heights in each window.

Abstract: A method for legalizing mixed-cell height standard cells of an IC is provided. A target standard cell is obtained in a window of a global placement. The target standard cell has a first area overlapping a first standard cell located in a first row of the window, and a second area overlapping a second standard cell located in a second row of the window. The target standard cell and the first standard cell are moved until the target standard cell does not overlap the first standard cell in the first row of the window. The target standard cell and the first standard cell are clustered as a first cluster when the target standard cell does not overlap the first standard cell. The first cluster is moved away from the second standard cell in the second row until the second standard cell does not overlap the first cluster.

Abstract: A method for legalizing mixed-cell height standard cells of an IC is provided. A target standard cell is obtained in a window of a global placement. The target standard cell has a first area overlapping a first standard cell located in a first row of the window, and a second area overlapping a second standard cell located in a second row of the window. The target standard cell and the first standard cell are moved until the target standard cell does not overlap the first standard cell in the first row of the window. The target standard cell and the first standard cell are clustered as a first cluster when the target standard cell does not overlap the first standard cell. The first cluster is moved away from the second standard cell in the second row until the second standard cell does not overlap the first cluster.

Abstract: A method and apparatus can include: providing a cover, the cover including face cover, neck cover, crown cover, side cover, and back cover; creating a cover opening in the cover above the face cover for exposure of facial features of a user from the cover; attaching a helmet cover at an attachment point near the back cover configured to expand around a helmet; and forming a helmet cover opening in the helmet.

Abstract: A method for manufacturing a chip package structure having a coating layer is provided. At least one chip package structure is mounted onto a terminal-protection film. The chip package structure has a top side, a back side opposite to the top side and a plurality of lateral sides. A plurality of terminals is disposed on the back side. The terminal-protection film at least partially seals the back side. A coating layer is formed over the top side, the lateral sides and a periphery region of the chip package structure, wherein the coating layer is not formed on the back side and the terminals. The terminal-protection film is debonded from the chip package structure.

Abstract: A separable face mask structure is wearable on a face of a human body and includes a face mask to which a lower edge of an openable closure member is coupled by a stitching line. The face mask includes a coupling structure, which includes a plurality of magnetic elements respectively arranged in the interiors of counterpart portions of the main body and the interiors of attraction-attaching portions of the openable closure member so that the main body and the openable closure member comprises can be magnetically attached to each other to form hermetical closure therebetween. At least one open space is selectively formed between the main body and the openable closure member so that by releasing the magnetic elements of the attraction-attaching portions on two opposite side edges of the openable closure member allows the open space to provide communication between the human face and the external space.

Abstract: The present invention provides a test card for multiple functions testing. The test card includes a host of media devices, all of which reside on a single printed circuit board; and a selection device which selects each one of the host of media devices for testing. The test card can test all SD, MMC, MS (Pro), SMC devices and functions in one time in a bench without inserting and removing the media devices, thus accelerates the production line test speed.

Abstract: The present invention provides a test card for multiple functions testing. The test card includes a host of media devices, all of which reside on a single printed circuit board; and a selection device which selects each one of the host of media devices for testing. The test card can test all SD, MMC, MS (Pro), SMC devices and functions in one time in a bench without inserting and removing the media devices, thus accelerates the production line test speed.

Abstract: An apparatus, method, and computer program are provided which allows service requesters to receive services from a single provider which can efficiently coordinate and cause the delivery of a requested service through a network, e.g. the Internet. Further the service is provided without compatibility obstacles and in which the requester can also use their preferred service providers. A request for service is made through the network to an application server which determines, from among a plurality of registered functional entities with the application server, which functional entity to route the request to. The functional entity may be an on-line or an off-line functional entity, i.e., an on-line or an off-line business. The functional entity produces output that is transmitted, either through the network or physical delivery, back to the requester and/or the application server. The application server can also use functional entities to transform incompatible data to requester, compatible data.