Patents by Inventor Shih-Chun Peng

Shih-Chun Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967596
    Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
  • Patent number: 11935981
    Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 19, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
  • Patent number: 11916074
    Abstract: Exemplary embodiments for an exemplary dual transmission gate and various exemplary integrated circuit layouts for the exemplary dual transmission gate are disclosed. These exemplary integrated circuit layouts represent double-height, also referred to as double rule, integrated circuit layouts. These double rule integrated circuit layouts include a first group of rows from among multiple rows of an electronic device design real estate and a second group of rows from among the multiple rows of the electronic device design real estate to accommodate a first metal layer of a semiconductor stack. The first group of rows can include a first pair of complementary metal-oxide-semiconductor field-effect (CMOS) transistors, such as a first p-type metal-oxide-semiconductor field-effect (PMOS) transistor and a first n-type metal-oxide-semiconductor field-effect (NMOS) transistor, and the second group of rows can include a second pair of CMOS transistors, such as a second PMOS transistor and a second NMOS transistor.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Wei Peng, Hui-Zhong Zhuang, Jiann-Tyng Tzeng, Li-Chun Tien, Pin-Dai Sue, Wei-Cheng Lin
  • Publication number: 20090258610
    Abstract: An apparatus for multiple modulations with a transition mode in a baseband transmitter and method therefor. An apparatus includes a first modulator, a second modulator, and a modulation output device. The first modulator performs a first modulation to produce a first modulated signal. The second modulator performs a second modulation to produce a second modulated signal. In response to a mode selection signal indicating switching the desired modulation output signal from a current one of the first and the second modulated signals to another one thereof, the modulation output device operates in a transition mode for a transition period to generate the desired modulation output signal according to a weighted sum of the first modulated signal and the second modulated signal. After the transition period, the modulation output device outputs the another one as the desired modulation output signal.
    Type: Application
    Filed: April 15, 2008
    Publication date: October 15, 2009
    Applicant: MEDIATEK INC.
    Inventors: Chia-Wei Kuo, Shih-Chun Peng, Chun-Hung Liu
  • Publication number: 20060198371
    Abstract: A method for analyzing the reliability of a flag value carried by a current block is disclosed. The method includes: determining whether the current block is a dummy block, and determining the flag value as invalid if the current block is determined as a dummy block. The step of determining the current block is a dummy block can be implemented through two methods. The first method is to utilize information (signal quality indicators) of the current block and a previous block to perform the dummy block determination. The second method is to only utilize information (including the signal quality indicators and coded USF correction indicators) of the current block to generate a determination value through substituting the information into a predetermined equation, and to perform the dummy block detection according to the determination value.
    Type: Application
    Filed: December 29, 2005
    Publication date: September 7, 2006
    Inventors: Ho-Chi Huang, Chai-Ming Lo, Wei-Nan Sun, Ying-Ying Chen, SHIH-CHUN PENG, Ti-Wen Yuan
  • Publication number: 20050238045
    Abstract: After a transmitter has encoded a flag value, the flag value is included in a block. A method for analyzing the reliability of the flag value outputted by the transmitter includes receiving the block; according to the received block, obtaining a coded flag value; according to the coded flag value, decoding the coded flag value to obtain a decoded flag result; determining whether or not the received block is or is not a dummy block; and if the received block is determined to be a dummy block, negating the reliability of the decoded flag result; otherwise, analyzing the reliability of the coded flag value to determine whether to affirm or negate the reliability of the decoded flag result.
    Type: Application
    Filed: November 16, 2004
    Publication date: October 27, 2005
    Inventors: SHIH-CHUN PENG, Wei-Nan Sun, Ti-Wen Yuan