Patents by Inventor Shih-Chyn Lin

Shih-Chyn Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160064594
    Abstract: A light-emitting diode (LED) includes a first type semiconductor layer, a second type semiconductor layer, a first current controlling structure, and a first electrode. The second type semiconductor layer is joined with the first type semiconductor layer. The second type semiconductor layer has a first region and a second region, in which the first region has a first threading dislocation density, the second region has a second threading dislocation density, and the first threading dislocation density is greater than the second threading dislocation density. The first current controlling structure is joined with the first type semiconductor layer and has at least one first current-injecting zone therein, in which the vertical projection of the second region on the first current controlling structure at least partially overlaps with the first current-injecting zone. The first electrode is electrically coupled with the first type semiconductor layer.
    Type: Application
    Filed: October 4, 2015
    Publication date: March 3, 2016
    Inventors: Li-Yi CHEN, Pei-Yu CHANG, Chih-Hui CHAN, Chun-Yi CHANG, Shih-Chyn LIN, Hsin-Wei LEE
  • Patent number: 9231153
    Abstract: A micro-light-emitting diode (micro-LED) includes a first type semiconductor layer, a second type semiconductor, a first current controlling layer, a first electrode, and a second electrode. The second type semiconductor layer and the first current controlling layer are joined with the first type semiconductor layer. The first current controlling layer has at least one opening therein. The first electrode is electrically coupled with the first type semiconductor layer through the opening. The second electrode is electrically coupled with the second type semiconductor layer. At least one of the first electrode and the second electrode has a light-permeable part. A vertical projection of the first current controlling layer on said one of the first electrode and the second electrode overlaps with the light-permeable part. The light-permeable part is transparent or semi-transparent.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: January 5, 2016
    Assignee: MIKRO MESA TECHNOLOGY CO., LTD.
    Inventors: Li-Yi Chen, Pei-Yu Chang, Chih-Hui Chan, Chun-Yi Chang, Shih-Chyn Lin, Hsin-Wei Lee
  • Patent number: 9219197
    Abstract: A micro-light-emitting diode (micro-LED) includes a first type semiconductor layer, a second type semiconductor layer, a first edge isolation structure, a first electrode, and a second electrode. The second type semiconductor layer and the first edge isolation structure are joined with the first type semiconductor layer. The first electrode is electrically coupled with the first type semiconductor layer. At least a part of a vertical projection of an edge of the first type semiconductor layer on the first electrode overlaps with the first electrode. The first edge isolation structure is at least partially located on the part of the first type semiconductor layer. The second electrode is electrically coupled with the second type semiconductor layer.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: December 22, 2015
    Assignee: MIKRO MESA TECHNOLOGY CO., LTD.
    Inventors: Li-Yi Chen, Pei-Yu Chang, Chih-Hui Chan, Chun-Yi Chang, Shih-Chyn Lin, Hsin-Wei Lee
  • Publication number: 20150349205
    Abstract: A micro-light-emitting diode (micro-LED) includes a first type semiconductor layer, a second type semiconductor layer, a first edge isolation structure, a first electrode, and a second electrode. The second type semiconductor layer and the first edge isolation structure are joined with the first type semiconductor layer. The first electrode is electrically coupled with the first type semiconductor layer. At least a part of a vertical projection of an edge of the first type semiconductor layer on the first electrode overlaps with the first electrode. The first edge isolation structure is at least partially located on the part of the first type semiconductor layer. The second electrode is electrically coupled with the second type semiconductor layer.
    Type: Application
    Filed: May 21, 2015
    Publication date: December 3, 2015
    Inventors: Li-Yi CHEN, Pei-Yu CHANG, Chih-Hui CHAN, Chun-Yi CHANG, Shih-Chyn LIN, Hsin-Wei LEE
  • Publication number: 20150349200
    Abstract: A micro-light-emitting diode (micro-LED) includes a first type semiconductor layer, a second type semiconductor, a first current controlling layer, a first electrode, and a second electrode. The second type semiconductor layer and the first current controlling layer are joined with the first type semiconductor layer. The first current controlling layer has at least one opening therein. The first electrode is electrically coupled with the first type semiconductor layer through the opening. The second electrode is electrically coupled with the second type semiconductor layer. At least one of the first electrode and the second electrode has a light-permeable part. A vertical projection of the first current controlling layer on said one of the first electrode and the second electrode overlaps with the light-permeable part. The light-permeable part is transparent or semi-transparent.
    Type: Application
    Filed: April 30, 2015
    Publication date: December 3, 2015
    Inventors: Li-Yi CHEN, Pei-Yu CHANG, Chih-Hui CHAN, Chun-Yi CHANG, Shih-Chyn LIN, Hsin-Wei LEE
  • Publication number: 20150179127
    Abstract: A liquid crystal display device comprises a pixel matrix including a plurality of subpixels, wherein the voltage polarities of two horizontal adjacent subpixels are opposite to one another, and the voltage polarity of one subpixel in four serial subpixels along a diagonal direction is opposite to the voltage polarities of the other three subpixels.
    Type: Application
    Filed: March 4, 2015
    Publication date: June 25, 2015
    Inventors: TSUNG CHENG LIN, SHYH FENG CHEN, SHIH CHYN LIN, HSIANG PIN FAN, KUEI SHENG TSENG
  • Patent number: 8531374
    Abstract: A compensation circuitry of gate driving pulse signal is adapted to receive a gate driving pulse signal and includes a pre-processing circuit, a peak detector, a discharge circuit, a voltage buffer and a charge pump circuit. The pre-preprocessing circuit performs a pre-processing operation to the gate driving pulse signal to adjust a voltage thereof. The pre-processed gate driving pulse signal then is transmitted to the peak detector for obtaining a peak voltage after a charging operation, and also is transmitted to the discharge circuit to determine whether to enable the discharge circuit so that providing the peak detector with a discharge loop when the discharge circuit is enabled. The charge pump circuit acquires the peak voltage through the voltage buffer and then modulates a waveform of the gate driving pulse signal according to the peak voltage. A display device using the above compensation circuitry also is provided.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: September 10, 2013
    Assignee: AU Optronics Corp.
    Inventors: Wei-Jen Kao, Shao-Chun Cheng, Chuo-Hsien Lin, Ming-Chang Shih, Chia-Kong Huang, Wen-Pin Chen, Shih-Chyn Lin
  • Publication number: 20120062534
    Abstract: A compensation circuitry of gate driving pulse signal is adapted to receive a gate driving pulse signal and includes a pre-processing circuit, a peak detector, a discharge circuit, a voltage buffer and a charge pump circuit. The pre-preprocessing circuit performs a pre-processing operation to the gate driving pulse signal to adjust a voltage thereof. The pre-processed gate driving pulse signal then is transmitted to the peak detector for obtaining a peak voltage after a charging operation, and also is transmitted to the discharge circuit to determine whether to enable the discharge circuit so that providing the peak detector with a discharge loop when the discharge circuit is enabled. The charge pump circuit acquires the peak voltage through the voltage buffer and then modulates a waveform of the gate driving pulse signal according to the peak voltage. A display device using the above compensation circuitry also is provided.
    Type: Application
    Filed: June 1, 2011
    Publication date: March 15, 2012
    Applicant: AU OPTRONICS CORP.
    Inventors: Wei-Jen KAO, Shao-Chun Cheng, Chuo-Hsien Lin, Ming-Chang Shih, Chia-Kong Huang, Wen-Pin Chen, Shih-Chyn Lin
  • Patent number: 8098791
    Abstract: A shift register includes a control circuit, a pull-up circuit and a pull-down circuit. The control circuit generates a control signal according to a start pulse signal during being enabled. The pull-up circuit produces a gate pulse signal according to a clock signal during being enabled by the control signal. The pull-up circuit includes a dual-gate transistor. A first gate of the dual-gate transistor is electrically coupled to the control signal, a second gate of the dual-gate transistor is electrically coupled to a predetermined voltage, the source/drain of the dual-gate transistor serves as an output terminal for the gate pulse signal, and the drain/source of the dual-gate transistor is electrically coupled to the clock signal. The pull-down circuit pulls a potential at the first gate and another potential at the output terminal down to a power supply potential during the pull-up circuit is disabled.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: January 17, 2012
    Assignee: AU Optronics Corp.
    Inventors: Shih-Chyn Lin, Hsiang-Pin Fan, Wen-Pin Chen, Kuei-Sheng Tseng, Chen-Yi Wu
  • Patent number: 7990485
    Abstract: A pixel structure electrically connected to a scan line and a data line is provided. The pixel structure includes an active device, a first pixel electrode, a mean potential equilibrium circuit, and a second pixel electrode. The active device is electrically connected to the scan line and the data line. The first pixel electrode is electrically connected to the active device. The mean potential equilibrium circuit is electrically connected to the scan line and the data line. The second pixel electrode is electrically connected to the mean potential equilibrium circuit.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: August 2, 2011
    Assignee: Au Optronics Corporation
    Inventors: Shyh-Feng Chen, Tsung-Cheng Lin, Shih-Chyn Lin
  • Publication number: 20110150169
    Abstract: A shift register includes a control circuit, a pull-up circuit and a pull-down circuit. The control circuit generates a control signal according to a start pulse signal during being enabled. The pull-up circuit produces a gate pulse signal according to a clock signal during being enabled by the control signal. The pull-up circuit includes a dual-gate transistor. A first gate of the dual-gate transistor is electrically coupled to the control signal, a second gate of the dual-gate transistor is electrically coupled to a predetermined voltage, the source/drain of the dual-gate transistor serves as an output terminal for the gate pulse signal, and the drain/source of the dual-gate transistor is electrically coupled to the clock signal.
    Type: Application
    Filed: May 28, 2010
    Publication date: June 23, 2011
    Inventors: Shih-Chyn LIN, Hsiang-Pin Fan, Wen-Pin Chen, Kuei-Sheng Tseng, Chen-Yi Wu
  • Publication number: 20100001942
    Abstract: A liquid crystal display device comprises a pixel matrix including a plurality of subpixels, wherein the voltage polarities of two horizontal adjacent subpixels are opposite to one another, and the voltage polarity of one subpixel in four serial subpixels along a diagonal direction is opposite to the voltage polarities of the other three subpixels.
    Type: Application
    Filed: May 7, 2009
    Publication date: January 7, 2010
    Applicant: AU OPTRONICS CORPORATION
    Inventors: TSUNG CHENG LIN, SHYH FENG CHEN, SHIH CHYN LIN, HSIANG PIN FAN, KUEI SHENG TSENG
  • Publication number: 20090109389
    Abstract: A pixel structure electrically connected to a scan line and a data line is provided. The pixel structure includes an active device, a first pixel electrode, a mean potential equilibrium circuit, and a second pixel electrode. The active device is electrically connected to the scan line and the data line. The first pixel electrode is electrically connected to the active device. The mean potential equilibrium circuit is electrically connected to the scan line and the data line. The second pixel electrode is electrically connected to the mean potential equilibrium circuit.
    Type: Application
    Filed: January 28, 2008
    Publication date: April 30, 2009
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Shyh-Feng Chen, Tsung-Cheng Lin, Shih-Chyn Lin
  • Publication number: 20080158745
    Abstract: Data transmission circuit with ESD protection comprises a first set of data lines and a second set of data lines; a first set of ESD protection components coupled to the first set of data lines; a second set of ESD protection components coupled to the second set of data lines; a first current path coupled to the first set of ESD protection components for dispensing the ESD current; and a second current path coupled to the second set of ESD protection components for dispensing the ESD current.
    Type: Application
    Filed: May 29, 2007
    Publication date: July 3, 2008
    Inventors: Shyh-Feng Chen, Tsung-Cheng Lin, Shih-Chyn Lin