Patents by Inventor Shih-Feng Shao

Shih-Feng Shao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220406976
    Abstract: A method for assembling an LED display includes the steps of: preparing a prefabricated diffuser film containing a light diffusion agent; mounting a plurality of light emitting elements on a substrate, thereby forming a plurality of gaps among the plurality of light emitting elements; filling the plurality of gaps with a black resin to form a planar surface composed of top surfaces of the plurality of light emitting elements and top surfaces of the black resin in the plurality of gaps; applying a transparent resin layer over the planar surface; and affixing the prefabricated diffuser film on the transparent resin layer. The resulting LED display has a plurality of light emitting elements surrounded by a black resin to form a checkered surface, a transparent resin layer affixed to the checkered surface; and a diffuser film affixed to the transparent resin layer by an adhesive.
    Type: Application
    Filed: June 16, 2022
    Publication date: December 22, 2022
    Inventors: Eric LI, Chang-Hung PAN, Shih-Feng SHAO, Kuan-Hsiueng WANG, Yi-Ling WEN, Ching LAI
  • Patent number: 8912555
    Abstract: A semiconductor light-emitting device includes a circuit board with a layout layer and a die bonding area. At least one positive endpoint, negative endpoint and function endpoint are disposed on the layout layer. At least one semiconductor light-emitting chip is disposed within the die bonding area, and is electrically coupled to the positive endpoint, the negative endpoint and the function endpoint to facilitate various connection configurations.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: December 16, 2014
    Assignee: Phostek, Inc.
    Inventors: Shih-Feng Shao, Heng Liu, Jinn Kong Sheu
  • Publication number: 20140055049
    Abstract: An illuminating device includes at least one light-emitting source. The light-emitting source includes a substrate; at least one light-emitting chip disposed on the substrate; and at least one constant-current component electrically coupled to the light-emitting chip. The light-emitting chip includes multiple light-emitting units that are electrically coupled in series, in parallel, or in series-parallel; a first-type electrode, disposed on at least one of the light-emitting units, for electrically coupling to a central DC power source; a second-type electrode disposed on at least one light-emitting unit different from the one, on which the first-type electrode is disposed; and a tapped point configured for electrically coupling at least one of the light-emitting units to the constant-current component.
    Type: Application
    Filed: April 12, 2013
    Publication date: February 27, 2014
    Applicant: Phostek, Inc.
    Inventors: Shih-Feng Shao, Yuan-Hsiao Chang, Shih Tsun Yang
  • Publication number: 20140054627
    Abstract: A semiconductor light-emitting device includes a circuit board with a layout layer and a die bonding area. At least one positive endpoint, negative endpoint and function endpoint are disposed on the layout layer. At least one semiconductor light-emitting chip is disposed within the die bonding area, and is electrically coupled to the positive endpoint, the negative endpoint and the function endpoint to facilitate various connection configurations.
    Type: Application
    Filed: April 12, 2013
    Publication date: February 27, 2014
    Applicant: Phostek, Inc.
    Inventors: Shih-Feng SHAO, Heng LIU, Jinn Kong Sheu
  • Publication number: 20130264588
    Abstract: A light emitting package includes a base and one or more LED units coupled to the base. The LED unit includes a plurality of vertically stacked epitaxial structures. Each epitaxial structure includes at least a first doped layer, at least a light emitting layer, and at least a second doped layer. At least one luminescent element is spaced a distance from the one or more LED units.
    Type: Application
    Filed: April 9, 2012
    Publication date: October 10, 2013
    Applicant: PHOSTEK, INC.
    Inventors: Heng Liu, Shih-Feng Shao
  • Publication number: 20130105825
    Abstract: A light emitting diode array comprises a plurality of light emitting diode units connected in series and arranged for forming an array with n rows and m columns. At least one of the numbers m and n of the array is an odd number.
    Type: Application
    Filed: April 19, 2012
    Publication date: May 2, 2013
    Applicant: PHOSTEK, INC.
    Inventors: Heng Liu, Shih-Feng Shao
  • Publication number: 20130056774
    Abstract: This invention provides lenses having a pendant shape profile and their applications and forming methods. In an embodiment, the lenses are used to encapsulate one or more light-emitting diode chips so as to increase the light extraction efficiency.
    Type: Application
    Filed: December 6, 2011
    Publication date: March 7, 2013
    Applicant: PHOSTEK, INC.
    Inventors: Jhih-Sin HONG, Shih-Feng SHAO
  • Publication number: 20120056228
    Abstract: A method for packaging LED chip modules is provided. First, a first sacrificial layer is disposed on a substrate. Afterwards, LED chips are synchronously disposed on the first sacrificial layer before the first sacrificial layer cures. Next, a first material, a second sacrificial layer, and a second material are used to form a support layer on the first sacrificial layer. The first sacrificial layer and the second sacrificial layer are then removed, so that LED chip modules are obtained, wherein each LED chip module has a corresponding support layer. Furthermore, a moving fixture is provided to synchronously remove chips from a wafer and dispose them on the sacrificial layer.
    Type: Application
    Filed: September 6, 2011
    Publication date: March 8, 2012
    Applicants: PHOSTEK, INC., NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Ray-Hua Horng, Jhih-Sin Hong, Shih-Feng Shao, Heng Liu
  • Patent number: 7622334
    Abstract: A cutting method for wafer-level packaging capable of protecting the contact pad, in which several cavities and precutting lines are formed at the front surface of a cap wafer, and the depth of each precutting line is lesser than the thickness of the cap wafer, followed by the bonding of the cap wafer to the device wafer, which has several devices and several bonding pads disposed on the surface of the device wafer, followed by performing a wafer dicing process, along the precutting lines cutting through the cap wafer, and after removing a portion of the cap wafer that is not bonded to the device wafer, for exposing the bonding pads at the surface of the device wafer, and finally performing a dicing process for forming many packaged dies.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: November 24, 2009
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Chun-Wei Tsai, Shih-Feng Shao
  • Patent number: 7598125
    Abstract: A cap wafer with cavities is etched through areas not covered by a patterned photoresist to form a plurality of openings. The cap wafer is bonded to a transparent wafer at the surface having the cavities and is segmented around the cavities to form a plurality of cap structures. The cap structures are hermetically sealed to a device wafer to form hermetic windows over devices and pads located on the device wafer.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: October 6, 2009
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Shih-Feng Shao, Ming-Yen Chiu
  • Patent number: 7510947
    Abstract: A cap wafer with patterned film formed thereon is etched through areas not covered by the patterned film to form a plurality of openings. Then, the cap wafer is bonded to a transparent wafer, and the cap wafer around the pattern film is segmented to form a plurality of cap structures. A device wafer with a plurality of devices and a plurality of contact pads electrically connected to the devices is subsequently provided. The cap structures and the device wafer are hermetically sealed to form a plurality of hermetic windows on the devices.
    Type: Grant
    Filed: July 3, 2006
    Date of Patent: March 31, 2009
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Shih-Feng Shao, Ming-Yen Chiu
  • Publication number: 20090061598
    Abstract: A cutting method for wafer-level packaging capable of protecting the contact pad, in which several cavities and precutting lines are formed at the front surface of a cap wafer, and the depth of each precutting line is lesser than the thickness of the cap wafer, followed by the bonding of the cap wafer to the device wafer, which has several devices and several bonding pads disposed on the surface of the device wafer, followed by performing a wafer dicing process, along the precutting lines cutting through the cap wafer, and after removing a portion of the cap wafer that is not bonded to the device wafer, for exposing the bonding pads at the surface of the device wafer, and finally performing a dicing process for forming many packaged dies.
    Type: Application
    Filed: April 9, 2008
    Publication date: March 5, 2009
    Inventors: Chun-Wei Tsai, Shih-Feng Shao
  • Publication number: 20070161158
    Abstract: A cap wafer with cavities is etched through areas not covered by a patterned photoresist to form a plurality of openings. The cap wafer is bonded to a transparent wafer at the surface having the cavities and is segmented around the cavities to form a plurality of cap structures. The cap structures are hermetically sealed to a device wafer to form hermetic windows over devices and pads located on the device wafer.
    Type: Application
    Filed: June 26, 2006
    Publication date: July 12, 2007
    Inventors: Shih-Feng Shao, Ming-Yen Chiu
  • Publication number: 20070161210
    Abstract: A cap wafer with patterned film formed thereon is etched through areas not covered by the patterned film to form a plurality of openings. Then, the cap wafer is bonded to a transparent wafer, and the cap wafer around the pattern film is segmented to form a plurality of cap structures. A device wafer with a plurality of devices and a plurality of contact pads electrically connected to the devices is subsequently provided. The cap structures and the device wafer are hermetically sealed to form a plurality of hermetic windows on the devices.
    Type: Application
    Filed: July 3, 2006
    Publication date: July 12, 2007
    Inventors: Shih-Feng Shao, Ming-Yen Chiu
  • Publication number: 20070077676
    Abstract: A method of fabricating a pressure sensor. An SOI wafer having a single crystalline silicon layer, an insulating layer and a silicon substrate is provided. The single crystalline silicon layer has a pressure sensing device. The silicon substrate and the insulating layer corresponding to the pressure sensing device are removed to form a cavity. A bonding substrate is adhered to the silicon substrate with a bonding layer.
    Type: Application
    Filed: March 15, 2006
    Publication date: April 5, 2007
    Inventors: Shih-Feng Shao, Chen-Hsiung Yang
  • Patent number: 7192842
    Abstract: A first wafer is provided, and a photosensitive masking-and-bonding pattern is formed on the surface of the first wafer. Then, an etching process using the photosensitive masking-and-bonding pattern as a hard mask is performed to form a wafer pattern on the surface of the first wafer. Finally, the first wafer is bonded to a second wafer with the photosensitive masking-and-bonding pattern.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: March 20, 2007
    Assignee: Touch Micro-Systems Technology Inc.
    Inventors: Shih-Feng Shao, Hsin-Ya Peng, Chen-Hsiung Yang
  • Publication number: 20060276006
    Abstract: A method of segmenting a wafer. A device wafer is provided, and a medium layer is formed on the upper surface of the device wafer. Then, a carrier wafer is provided, and the medium layer is mounted on the surface of the carrier wafer. Subsequently, a segment process is performed to form a plurality of dies, and meanwhile these dies are mounted on the medium layer. Thereafter, the carrier wafer is departed from the medium layer, the dies are bonded to an extendable film, and the medium layer is removed.
    Type: Application
    Filed: October 20, 2005
    Publication date: December 7, 2006
    Inventors: Chen-Hsiung Yang, Shih-Feng Shao, Hong-Da Chang
  • Publication number: 20060084238
    Abstract: A first wafer is provided, and a photosensitive masking-and-bonding pattern is formed on the surface of the first wafer. Then, an etching process using the photosensitive masking-and-bonding pattern as a hard mask is performed to form a wafer pattern on the surface of the first wafer. Finally, the first wafer is bonded to a second wafer with the photosensitive masking-and-bonding pattern.
    Type: Application
    Filed: January 20, 2005
    Publication date: April 20, 2006
    Inventors: Shih-Feng Shao, Hsin-Ya Peng, Chen-Hsiung Yang
  • Publication number: 20060057775
    Abstract: A method of forming a wafer backside interconnecting wire includes forming a mask layer on the back surface, the mask layer including at least an opening corresponding to the bonding pad, performing a first etching process from the back surface to remove the wafer unprotected by the mask layer to form a recess, removing the mask layer, and forming an interconnecting wire on the back surface.
    Type: Application
    Filed: November 19, 2004
    Publication date: March 16, 2006
    Inventors: Shih-Feng Shao, Chen-Hsiung Yang, Hsin-Ya Peng
  • Patent number: 7008821
    Abstract: A method of forming a wafer backside interconnecting wire includes forming a mask layer on the back surface, the mask layer including at least an opening corresponding to the bonding pad, performing a first etching process from the back surface to remove the wafer unprotected by the mask layer to form a recess, removing the mask layer, and forming an interconnecting wire on the back surface.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: March 7, 2006
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Shih-Feng Shao, Chen-Hsiung Yang, Hsin-Ya Peng