Abstract: A semiconductor structure including a substrate, buried word line structures, a transistor structure, a first hard mask layer, hard mask marks, a second hard mask layer, and contacts. The substrate includes a first region and a second region. The buried word line structures are located in the substrate in the first region. The transistor structure is located on the substrate in the second region. The first hard mask layer is located on the transistor structure. The first hard mask layer has recesses. The hard mask marks are located in the recesses. The second hard mask layer is located on the substrate in the first region. The second hard mask layer has openings. The contacts are located in the openings.

Abstract: The invention discloses a semiconductor memory device, which is characterized by comprising a substrate defining a cell region and an adjacent periphery region, a plurality of bit lines are arranged on the substrate and arranged along a first direction, each bit line comprises a conductive part, and the bit line comprises four sidewalls, and a spacer surrounds the four sidewalls of the bit line, the spacer comprises two short spacers covering two ends of the conductive part, two long spacers covering the two long sides of the conductive part, and a plurality of storage node contact isolations located between any two adjacent bit lines, at least a part of the storage node contact isolations cover directly above the spacers. The structure of the invention can improve the electrical isolation effect, preferably avoid leakage current and improve the quality of components.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Abstract: The invention discloses a semiconductor memory device, which is characterized by comprising a substrate defining a cell region and an adjacent periphery region, a plurality of bit lines are arranged on the substrate and arranged along a first direction, each bit line comprises a conductive part, and the bit line comprises four sidewalls, and a spacer surrounds the four sidewalls of the bit line, the spacer comprises two short spacers covering two ends of the conductive part, two long spacers covering the two long sides of the conductive part, and a plurality of storage node contact isolations located between any two adjacent bit lines, at least a part of the storage node contact isolations cover directly above the spacers. The structure of the invention can improve the electrical isolation effect, preferably avoid leakage current and improve the quality of components.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Abstract: A semiconductor structure includes an active area in a substrate, a device isolation region surrounding the active area, first and second bit line structures on the substrate, a conductive diffusion region in the active area between the first and the second bit line structures, and a contact hole between the first and the second bit line structures. The contact hole partially exposes the conductive diffusion region. A buried plug layer is disposed in the contact hole and in direct contact with the conductive diffusion region. A storage node contact layer is disposed on the buried plug layer within the contact hole. The storage node contact layer has a downwardly protruding portion surrounded by the buried plug layer. The buried plug layer has a U-shaped cross-sectional profile.

Abstract: The present disclosure provides a biofragmentable sponge, comprising a three-dimensional porous scaffold formed by freeze-drying a mixture of about 5% to about 20% (w/w) of silk protein, about 5% to about 85% (w/w) of a water soluble synthetic polymer or a mixture of water soluble synthetic polymers, and about 10% to about 90% (w/w) of a polysaccharide.

Abstract: A semiconductor structure includes an active area in a substrate, a device isolation region surrounding the active area, first and second bit line structures on the substrate, a conductive diffusion region in the active area between the first and the second bit line structures, and a contact hole between the first and the second bit line structures. The contact hole partially exposes the conductive diffusion region. A buried plug layer is disposed in the contact hole and in direct contact with the conductive diffusion region. A storage node contact layer is disposed on the buried plug layer within the contact hole. The storage node contact layer has a downwardly protruding portion surrounded by the buried plug layer. The buried plug layer has a U-shaped cross-sectional profile.

Abstract: A semiconductor structure includes an active area in a substrate, a device isolation region surrounding the active area, first and second bit line structures on the substrate, a conductive diffusion region in the active area between the first and the second bit line structures, and a contact hole between the first and the second bit line structures. The contact hole partially exposes the conductive diffusion region. A buried plug layer is disposed in the contact hole and in direct contact with the conductive diffusion region. A storage node contact layer is disposed on the buried plug layer within the contact hole. The storage node contact layer has a downwardly protruding portion surrounded by the buried plug layer. The buried plug layer has a U-shaped cross-sectional profile.

Abstract: A semiconductor structure includes an active area in a substrate, a device isolation region surrounding the active area, first and second bit line structures on the substrate, a conductive diffusion region in the active area between the first and the second bit line structures, and a contact hole between the first and the second bit line structures. The contact hole partially exposes the conductive diffusion region. A buried plug layer is disposed in the contact hole and in direct contact with the conductive diffusion region. A storage node contact layer is disposed on the buried plug layer within the contact hole. The storage node contact layer has a downwardly protruding portion surrounded by the buried plug layer. The buried plug layer has a U-shaped cross-sectional profile.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench.

Abstract: An image synchronization method for a three-dimensional (3D) display apparatus is provided. The method includes steps of: receiving a plurality of first-eye image frames and a plurality of second-eye image frames; selecting a first image frame from the first-eye image frames according to a system time; selecting a second image frame from the second-eye image frames according to a timestamp of the first image frame; and outputting the first image frame and the second image frame.

Abstract: A stereo image output method includes: providing a request command; outputting current image frame information from a storage unit in response to the request command, and triggering an image synchronization operation to update the image frame information in the storage unit; and outputting a set of stereo images from a memory according to the image frame information.

Abstract: A stereo image output method includes: providing a request command; outputting current image frame information from a storage unit in response to the request command, and triggering an image synchronization operation to update the image frame information in the storage unit; and outputting a set of stereo images from a memory according to the image frame information.

Abstract: An image synchronization method for a three-dimensional (3D) display apparatus is provided. The method includes steps of: receiving a plurality of first-eye image frames and a plurality of second-eye image frames; selecting a first image frame from the first-eye image frames according to a system time; selecting a second image frame from the second-eye image frames according to a timestamp of the first image frame; and outputting the first image frame and the second image frame.