Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.

Abstract: A diode device and manufacturing method thereof are provided. The diode device includes a substrate, an epitaxial layer, a trench gate structure, a Schottky diode structure and a termination structure. An active region and a termination region are defined in the epitaxial layer. The Schottky diode structure and the trench gate structure are located in the active region and the termination structure is located in the termination region. The termination structure includes a termination trench formed in the epitaxial layer, a termination insulating layer, a first spacer, a second spacer and a first doped region. The termination insulating layer is conformingly formed on inner walls of the termination trench. The first and second spacers are disposed on two sidewalls of the termination trench. The first doped region formed beneath the termination trench has a conductive type reverse to that of the epitaxial layer.

Abstract: A super-junction semiconductor device is provided. The super-junction semiconductor device includes a substrate, a drift layer, a field insulator, a floating electrode layer, an isolation layer, and at least one transistor structure. The drift layer includes a plurality of n-type and p-type pillars alternately arranged in parallel to form a super-junction structure. An active region, a termination region and a transition region located therebetween are defined in the drift layer. The field insulator disposed on a surface of the drift layer covers the termination region and a portion of the transition region. The floating electrode layer disposed on the field insulator partially overlaps with the termination region. The transistor structure includes a source conductive layer extending from the active region to the transition region and superimposed on a portion of the floating electrode layer. The source conductive layer is isolated from the floating electrode layer by the isolation layer.

Abstract: A super-junction semiconductor device is provided. The super-junction semiconductor device includes a substrate, a drift layer, a field insulator, a floating electrode layer, an isolation layer, and at least one transistor structure. The drift layer includes a plurality of n-type and p-type pillars alternately arranged in parallel to form a super-junction structure. An active region, a termination region and a transition region located therebetween are defined in the drift layer. The field insulator disposed on a surface of the drift layer covers the termination region and a portion of the transition region. The floating electrode layer disposed on the field insulator partially overlaps with the termination region. The transistor structure includes a source conductive layer extending from the active region to the transition region and superimposed on a portion of the floating electrode layer. The source conductive layer is isolated from the floating electrode layer by the isolation layer.

Abstract: A diode device and manufacturing method thereof are provided. The diode device includes a substrate, an epitaxial layer, a trench gate structure, a Schottky diode structure and a termination structure. An active region and a termination region are defined in the epitaxial layer. The Schottky diode structure and the trench gate structure are located in the active region and the termination structure is located in the termination region. The termination structure includes a termination trench formed in the epitaxial layer, a termination insulating layer, a first spacer, a second spacer and a first doped region. The termination insulating layer is conformingly formed on inner walls of the termination trench. The first and second spacers are disposed on two sidewalls of the termination trench. The first doped region formed beneath the termination trench has a conductive type reverse to that of the epitaxial layer.

Abstract: A light emitting element array module includes a board; a silicon base having a first side, a second side opposite to the first side and adhered to the board, a third side having a first angle with the second side, a fourth side substantially in parallel with the first side and having a second angle with the third side, and a fifth side having a third angle with the fourth side; a chip having a first main surface formed with at least one light emitting element array and at least one pad array, and a second main surface adhered to the board; a driving device adhered to the first side of the silicon base; and a plurality of metal wires for connecting the pad array to the driving device.

Abstract: The invention is a silicon pressure micro-sensing device and the fabrication process thereof. The silicon pressure micro-sensing device includes a pressure chamber, and is constituted of a P-type substrate with a taper chamber and an N-type epitaxial layer thereon. On the N-type epitaxial layer are a plurality of piezo-resistance sensing units which sense deformation caused by pressure. The fabrication pressure of the silicon pressure micro-sensing device includes a step of first making a plurality of holes on the N-type epitaxial layer to reach the P-type substrate beneath. Then, by an anisotropic etching stop technique, in which etchant pass through the holes, a taper chamber is formed in the P-type substrate. Finally, an insulating material is applied to seal the holes, thus attaining the silicon pressure micro-sensing device that is able to sense pressure differences between two ends thereof.

Abstract: The invention is a silicon pressure micro-sensing device and the fabrication process thereof. The silicon pressure micro-sensing device includes a pressure chamber, and is constituted of a P-type substrate with a taper chamber and an N-type epitaxial layer thereon. On the N-type epitaxial layer are a plurality of piezo-resistance sensing units which sense deformation caused by pressure. The fabrication pressure of the silicon pressure micro-sensing device includes a step of first making a plurality of holes on the N-type epitaxial layer to reach the P-type substrate beneath. Then, by an anisotropic etching stop technique, in which etchant pass through the holes, a taper chamber is formed in the P-type substrate. Finally, an insulating material is applied to seal the holes, thus attaining the silicon pressure micro-sensing device that is able to sense pressure differences between two ends thereof.