Patents by Inventor Shih-Hao Cheng

Shih-Hao Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096834
    Abstract: A method is provided. The method includes determining a first bump map indicative of a first set of positions of bumps. The method includes determining, based upon the first bump map, a first plurality of bump densities associated with a plurality of regions of the first bump map. The method includes smoothing the first plurality of bump densities to determine a second plurality of bump densities associated with the plurality of regions of the first bump map. The method includes determining, based upon the second plurality of bump densities, a second bump map indicative of the first set of positions of the bumps and a set of sizes of the bumps.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 21, 2024
    Inventors: Shih Hsuan HSU, Chan-Chung CHENG, Chun-Chen LIU, Cheng-Hung CHEN, Peng-Ren CHEN, Wen-Hao CHENG, Jong-l MOU
  • Patent number: 11756989
    Abstract: A capacitor is made using a wafer, and includes structural elevation portions to allow an electrode layer in the capacitor to be extended along surface profiles of the structural elevation portions to thereby increase its extension length, so as to reduce capacitor area, simplify capacitor manufacturing process and reduce manufacturing cost.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: September 12, 2023
    Assignee: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
    Inventors: Wei-Yu Lin, Chuan-Chieh Lin, Shih-Hao Cheng
  • Patent number: 11621128
    Abstract: A capacitor unit formed by a capacitor integrated structure is provided. The capacitor integrated structure is cut to form capacitor units separated from each other, and each of the capacitor units includes: a substrate; an isolation layer located on the substrate; a capacitor stacked structure located on the isolation layer, wherein the isolation layer electrically isolates the substrate from the capacitor stacked structure; and two electrode connectors located on the capacitor stacked structure and being exposed.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: April 4, 2023
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wei-Yu Lin, Shih-Hao Cheng
  • Patent number: 11588072
    Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first dopant. The second semiconductor structure is located on the first semiconductor structure and includes a second dopant different from the first dopant. The active region includes a plurality of semiconductor pairs and is located between the first semiconductor structure and the second semiconductor structure. One of the plurality of semiconductor pairs has a barrier layer and a well layer and includes the first dopant. The barrier layer has a first thickness and a first Al content, and the well layer has a second thickness and a second Al content, the second thickness is less than the first thickness, and the second Al content is less than the first Al content.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: February 21, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Yen-Chun Tseng, Kuo-Feng Huang, Shih-Chang Lee, Ming-Ta Chin, Shih-Nan Yen, Cheng-Hsing Chiang, Chia-Hung Lin, Cheng-Long Yeh, Yi-Ching Lee, Jui-Che Sung, Shih-Hao Cheng
  • Publication number: 20220399436
    Abstract: A capacitor is made using a wafer, and includes structural elevation portions to allow an electrode layer in the capacitor to be extended along surface profiles of the structural elevation portions to thereby increase its extension length, so as to reduce capacitor area, simplify capacitor manufacturing process and reduce manufacturing cost.
    Type: Application
    Filed: August 22, 2022
    Publication date: December 15, 2022
    Inventors: WEI-YU LIN, CHUAN-CHIEH LIN, SHIH-HAO CHENG
  • Patent number: 11528447
    Abstract: A video messaging system facilitates a video messaging session between a client device and a remote device. A remote device provides information (e.g., a link) to a client device for connecting to a video messaging session. The client device uses the provided information to connect to the video messaging session between the client device and the remote device. The video messaging session generally includes two-way communication, with at least video information being transmitted by the client device to the remote device, and instructions describing video operations being transmitted by the remote device to the client device. The video operations may include annotating the video, rewinding the video, pausing the video, and various other modifications to the video. The video messaging system may mirror operations performed on one device (e.g., the remote device) on the other device (e.g., the client device) in the video messaging session.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: December 13, 2022
    Assignee: Viewabo, Inc.
    Inventor: George Shih-Hao Cheng
  • Patent number: 11289470
    Abstract: A method of manufacturing a trench transistor structure including the following steps is provided. A substrate structure is provided. A first region and a second region are defined in the substrate structure. The substrate structure has a first trench located in the first region and a second trench located in the second region. A transistor device is formed in the first region. The transistor device includes an electrode located in the first trench. The electrode and the substrate structure are isolated from each other. An electrostatic discharge (ESD) protection device is formed in the second region. The ESD protection device includes a main body layer located in the second trench. The main body layer has a planarized top surface. PN junctions are located in the main body layer. The main body layer and the substrate structure are isolated from each other.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: March 29, 2022
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wei-Yu Lin, Shih-Hao Cheng
  • Publication number: 20220068568
    Abstract: A capacitor unit formed by a capacitor integrated structure is provided. The capacitor integrated structure is cut to form capacitor units separated from each other, and each of the capacitor units includes: a substrate; an isolation layer located on the substrate; a capacitor stacked structure located on the isolation layer, wherein the isolation layer electrically isolates the substrate from the capacitor stacked structure; and two electrode connectors located on the capacitor stacked structure and being exposed.
    Type: Application
    Filed: November 10, 2021
    Publication date: March 3, 2022
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wei-Yu Lin, Shih-Hao Cheng
  • Patent number: 11211203
    Abstract: A capacitor unit and a manufacturing method thereof are provided. The manufacturing method includes the following steps. An isolation layer is formed on a substrate. A first capacitor stacked structure and a second capacitor stacked structure are formed on the isolation layer. Electrode connectors are formed on the first capacitor stacked structure and the second capacitor stacked structure. The electrode connectors are exposed, so that the electrode connectors, the first capacitor stacked structure, the second capacitor stacked structure, the isolation layer, and the substrate are combined to form a capacitor integrated structure, wherein the isolation layer electrically isolates the substrate from the first capacitor stacked structure and the second capacitor stacked structure. The capacitor integrated structure is cut to form a first capacitor unit and a second capacitor unit separated from each other.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: December 28, 2021
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wei-Yu Lin, Shih-Hao Cheng
  • Publication number: 20210258537
    Abstract: A video messaging system facilitates a video messaging session between a client device and a remote device. A remote device provides information (e.g., a link) to a client device for connecting to a video messaging session. The client device uses the provided information to connect to the video messaging session between the client device and the remote device. The video messaging session generally includes two-way communication, with at least video information being transmitted by the client device to the remote device, and instructions describing video operations being transmitted by the remote device to the client device. The video operations may include annotating the video, rewinding the video, pausing the video, and various other modifications to the video. The video messaging system may mirror operations performed on one device (e.g., the remote device) on the other device (e.g., the client device) in the video messaging session.
    Type: Application
    Filed: May 4, 2021
    Publication date: August 19, 2021
    Inventor: George Shih-Hao Cheng
  • Patent number: 11012664
    Abstract: A video messaging system facilitates a video messaging session between a client device and a remote device. A remote device provides information (e.g., a link) to a client device for connecting to a video messaging session. The client device uses the provided information to connect to the video messaging session between the client device and the remote device. The video messaging session generally includes two-way communication, with at least video information being transmitted by the client device to the remote device, and instructions describing video operations being transmitted by the remote device to the client device. The video operations may include annotating the video, rewinding the video, pausing the video, and various other modifications to the video. The video messaging system may mirror operations performed on one device (e.g., the remote device) on the other device (e.g., the client device) in the video messaging session.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: May 18, 2021
    Assignee: Viewabo, Inc.
    Inventor: George Shih-Hao Cheng
  • Publication number: 20210135052
    Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first dopant. The second semiconductor structure is located on the first semiconductor structure and includes a second dopant different from the first dopant. The active region includes a plurality of semiconductor pairs and is located between the first semiconductor structure and the second semiconductor structure. One of the plurality of semiconductor pairs has a barrier layer and a well layer and includes the first dopant. The barrier layer has a first thickness and a first Al content, and the well layer has a second thickness and a second Al content, the second thickness is less than the first thickness, and the second Al content is less than the first Al content.
    Type: Application
    Filed: November 4, 2020
    Publication date: May 6, 2021
    Inventors: Yen-Chun Tseng, Kuo-Feng Huang, Shih-Chang Lee, Ming-Ta Chin, Shih-Nan Yen, Cheng-Hsing Chiang, Chia-Hung Lin, Cheng-Long Yeh, Yi-Ching Lee, Jui-Che Sung, Shih-Hao Cheng
  • Publication number: 20210091067
    Abstract: A method of manufacturing a trench transistor structure including the following steps is provided. A substrate structure is provided. A first region and a second region are defined in the substrate structure. The substrate structure has a first trench located in the first region and a second trench located in the second region. A transistor device is formed in the first region. The transistor device includes an electrode located in the first trench. The electrode and the substrate structure are isolated from each other. An electrostatic discharge (ESD) protection device is formed in the second region. The ESD protection device includes a main body layer located in the second trench. The main body layer has a planarized top surface. PN junctions are located in the main body layer. The main body layer and the substrate structure are isolated from each other.
    Type: Application
    Filed: December 9, 2020
    Publication date: March 25, 2021
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wei-Yu Lin, Shih-Hao Cheng
  • Publication number: 20210036098
    Abstract: A capacitor is made using a wafer, and includes structural elevation portions to allow an electrode layer in the capacitor to be extended along surface profiles of the structural elevation portions to thereby increase its extension length, so as to reduce capacitor area, simplify capacitor manufacturing process and reduce manufacturing cost.
    Type: Application
    Filed: January 13, 2020
    Publication date: February 4, 2021
    Inventors: WEI-YU LIN, CHUAN-CHIEH LIN, SHIH-HAO CHENG
  • Patent number: 10903203
    Abstract: A trench transistor structure includes a substrate structure, a transistor device, and an electrostatic discharge (ESD) protection device. A first region and a second region are defined in the substrate structure. The substrate structure has a first trench located in the first region and a second trench located in the second region. The transistor device is located in the first region and includes an electrode located in the first trench. The electrode and the substrate structure are isolated from each other. The ESD protection device is located in the second region and includes a main body layer located in the second trench. The main body layer has a planarized top surface. PN junctions are located in the main body layer. The main body layer and the substrate structure are isolated from each other.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: January 26, 2021
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wei-Yu Lin, Shih-Hao Cheng
  • Publication number: 20200413006
    Abstract: A video messaging system facilitates a video messaging session between a client device and a remote device. A remote device provides information (e.g., a link) to a client device for connecting to a video messaging session. The client device uses the provided information to connect to the video messaging session between the client device and the remote device. The video messaging session generally includes two-way communication, with at least video information being transmitted by the client device to the remote device, and instructions describing video operations being transmitted by the remote device to the client device. The video operations may include annotating the video, rewinding the video, pausing the video, and various other modifications to the video. The video messaging system may mirror operations performed on one device (e.g., the remote device) on the other device (e.g., the client device) in the video messaging session.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 31, 2020
    Inventor: George Shih-Hao Cheng
  • Publication number: 20200143992
    Abstract: A capacitor unit and a manufacturing method thereof, which mainly include a substrate, an isolation layer formed on the substrate, and capacitor stacked structures located on the isolation layer to form a capacitor integrated structure including the capacitor units, are provided. Therefore, the capacitor integrated structure can be cut to form a plurality of the capacitor units that can function as capacitors, thereby simplifying the capacitor manufacturing process and reducing the manufacturing cost.
    Type: Application
    Filed: July 22, 2019
    Publication date: May 7, 2020
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wei-Yu Lin, Shih-Hao Cheng
  • Publication number: 20200135713
    Abstract: A trench transistor structure includes a substrate structure, a transistor device, and an electrostatic discharge (ESD) protection device. A first region and a second region are defined in the substrate structure. The substrate structure has a first trench located in the first region and a second trench located in the second region. The transistor device is located in the first region and includes an electrode located in the first trench. The electrode and the substrate structure are isolated from each other. The ESD protection device is located in the second region and includes a main body layer located in the second trench. The main body layer has a planarized top surface. PN junctions are located in the main body layer. The main body layer and the substrate structure are isolated from each other.
    Type: Application
    Filed: October 24, 2018
    Publication date: April 30, 2020
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wei-Yu Lin, Shih-Hao Cheng
  • Publication number: 20090187680
    Abstract: A controller system with programmable bi-directional input/output terminals includes a micro controller, a terminal block and an interface unit connected between the micro controller and the terminal block. The interface unit includes a predetermined number of uni-directional input terminals, a predetermined number of uni-directional output terminals, and a predetermined number of bi-directional terminals. The micro controller can selectively set the bi-direction terminals as input terminals or output terminals according to an ID signal from the interface unit or a user parameter. Therefore, the number of input/output terminals for the controller system can be flexibly adjusted.
    Type: Application
    Filed: January 21, 2008
    Publication date: July 23, 2009
    Inventors: Shih-Chieh LIAO, Shih-Hao Cheng
  • Publication number: 20060284854
    Abstract: The present invention discloses a cordless electromagnetic induction system, which comprises a cordless pen and a tablet connecting to a host. In this regards, the cordless pen comprises a battery for supplying power to the cordless pen, a radio frequency (RF) oscillation circuit for generating RF signal representing the location and status of the cordless pen, a wake up apparatus, and a sleep control apparatus. The wake up apparatus sets the cordless pen into a working mode and startup the RF oscillation circuit when receiving a wakeup RF signal. Moreover, the sleep control apparatus sets the cordless pen into a sleep mode and shutdown the RF oscillation circuit when the cordless pen is idle for a while in the working mode. In this embodiment, the tablet comprises a control apparatus, a tablet RF emitter, and a tablet RF receiver for receiving RF signal, representing the location and status of said cordless pen, from the RF oscillation circuit and informing the control apparatus.
    Type: Application
    Filed: June 20, 2005
    Publication date: December 21, 2006
    Inventors: Shih-Hao Cheng, Chih-An Chen