Abstract: A method for forming a semiconductor device structure includes forming nanostructures over a substrate. The method also includes forming a gate structure wrapped around the nanostructures. The method also includes forming source/drain epitaxial structures over opposite sides of the nanostructures. The method also includes forming a first interlayer dielectric structure over the source/drain epitaxial structures. The method also includes removing the first interlayer dielectric structure. The method also includes forming a recess in the source/drain epitaxial structures. The method also includes forming a silicide structure in the recess. The method also includes forming a second interlayer dielectric structure over the silicide structure.

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate having a base and a fin over the base. The method includes forming a first gate stack wrapped around the fin. The method includes forming a first gate spacer over a first sidewall of the first gate stack. The method includes partially removing the fin, which is not covered by the first gate stack and the first gate spacer. The method includes removing a first upper portion of the first gate stack to expose a second upper portion of the first gate spacer. The method includes removing the second upper portion of the first gate spacer. The method includes removing a first lower portion of the first gate stack and the fin originally wrapped by the first gate stack. The method includes forming a dielectric channel-cut structure in the trench.

Abstract: A method of forming a semiconductor package is provided. The method includes forming a micro lens recessed from the top surface of a substrate. A concave area is formed between the surface of the micro lens and the top surface of the substrate. The method includes depositing a first dielectric material that fills a portion of the concave area using a spin coating process. The method includes depositing a second dielectric material that fills the remainder of the concave area and covers the top surface of the substrate using a chemical vapor deposition process. The method includes planarizing the second dielectric material. The method includes forming a bonding layer on the planarized second dielectric material and over the top surface of the substrate. The method includes bonding a semiconductor wafer to the substrate via the bonding layer.

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of metal portions, a plurality of nanosheet structures, and a plurality of isolation structures. The metal portions are disposed on the semiconductor substrate and are spaced apart from each other. The nanosheet structures are surrounded by the metal portions such that the nanosheet structures are spaced apart from each other. The isolation structures are disposed on the semiconductor substrate such that two adjacent ones of the metal portions are isolated from each other by a corresponding one of the isolation structures. Each of the isolation structures includes a first dielectric layer and an air gap surrounded by the first dielectric layer.

Abstract: A package structure and a method for forming the same are provided. The package structure includes a first package structure and a second package structure. The first package structure includes a first device formed over a first substrate. The first device includes a first conductive plug connected to a through substrate via (TSV) structure formed in the first substrate. A buffer layer surrounds the first substrate. A first bonding layer is formed over the first substrate and the buffer layer. The second package structure includes a second device formed over a second substrate. A second bonding layer is formed over the second device. A hybrid bonding structure is between the first package structure and the second package structure by bonding the first bonding layer to the second bonding layer.

Abstract: In a method of cleaning a lithography system, during idle mode, a stream of air is directed, through a first opening, into a chamber of a wafer table of an EUV lithography system. One or more particles is extracted by the directed stream of air from surfaces of one or more wafer chucks in the chamber of the wafer table. The stream of air and the extracted one or more particle are drawn, through a second opening, out of the chamber of the wafer table.

Abstract: A method includes bonding a first semiconductor die and a second semiconductor die to a substrate, where a gap is disposed between a first sidewall of the first semiconductor die and a second sidewall of the second semiconductor die, performing a plasma treatment to dope top surfaces and sidewalls of each of the first semiconductor die and the second semiconductor die with a first dopant, where a concentration of the first dopant in the first sidewall decreases in a vertical direction from a top surface of the first semiconductor die towards a bottom surface of the first semiconductor die, and a concentration of the first dopant in the second sidewall decreases in a vertical direction from a top surface of the second semiconductor die towards a bottom surface of the second semiconductor die, and filling the gap with a spin-on dielectric material.

Abstract: Embodiments of the present disclosure generally relate to lithography systems. In one embodiment, a method is disclosed. The method includes measuring a location of a die pad of a die placed on a substrate and determining a die pad shift between an expected location of the die pad and the measured location of the die pad. The method also includes using the determined die pad shift and an expected via location to generate a shifted via location for a via electrically connecting to the die pad. The method further includes patterning the via at the shifted via location with a maskless lithography tool and utilizing a physical mask with a mask-based lithography tool to pattern a redistribution layer (RDL) pad electrically connected to the via patterned at the shifted via location with the maskless lithography tool.

Abstract: Exemplary methods of packaging a substrate may include rotationally aligning a substrate to a predetermined angular position. The methods may include transferring the substrate to a metrology station. The methods may include measuring a topology of the substrate at the metrology station. The methods may include applying a first chucking force to the substrate to flatten the substrate. The methods may include generating a mapping of a die pattern on an exposed surface of the substrate. The methods may include transferring the substrate to a printing station. The methods may include applying a second chucking force to the substrate to flatten the substrate against a surface of the printing station. The methods may include adjusting a printing pattern based on the mapping of the die pattern. The methods may include printing the printing pattern on the exposed surface of the substrate.

Abstract: Exemplary methods of packaging a substrate may include rotationally aligning a substrate to a predetermined angular position. The methods may include transferring the substrate to a metrology station. The methods may include measuring a topology of the substrate at the metrology station. The methods may include applying a first chucking force to the substrate to flatten the substrate. The methods may include generating a mapping of a die pattern on an exposed surface of the substrate. The methods may include transferring the substrate to a printing station. The methods may include applying a second chucking force to the substrate to flatten the substrate against a surface of the printing station. The methods may include adjusting a printing pattern based on the mapping of the die pattern. The methods may include printing the printing pattern on the exposed surface of the substrate.

Abstract: Actual physical locations of dies on a substrate package may be identified without using a full metrology scan of the substrate. Instead, one or more cameras may be used to efficiently locate the approximate location of any of the alignment features based on their expected positioning in the design file for the packages are substrate. The cameras may then be moved to locations where alignment features should be, and images may be captured to determine the actual location of the alignment feature. These actual locations of the alignment features may then be used to identify coordinates for the dies, as well as rotations and/or varying heights of the dies on the packages. A difference between the expected location from the design file and the actual physical location may be used to adjust instructions for the digital lithography system to compensate for the misalignment of the dies.

Abstract: The present disclosure provides a multi-substrate handling system having an alignment apparatus capable of positioning each of a set of substrates in predetermined orientations for transfer. A buffer chamber is configured to receive and condition the set of substrates which are disposed on a substrate carrier. A first transfer assembly is configured to transfer the set of substrates to and from the buffer chamber and is capable of transferring each of the set of substrates from the alignment apparatus to the carrier in the buffer chamber. The carrier includes a plurality of modules capable of securing the set of substrates. The system includes a second transfer assembly having at least two robots configured to transfer the carrier of the set of substrates between the buffer chamber and a process chamber. The process chamber is capable of processing the set of substrates using different process parameters for each substrate.

Abstract: An object detection method, an electronic apparatus and an object detection system are provided. The method is adapted to the electronic apparatus and includes the following steps. A first image is obtained. A geometric transformation operation is performed on the first image to obtain at least one second image. The first image and the at least one second image are combined to generate a combination image. The combination image including the first image and the at least one second image is inputted into a trained deep learning model to detect a target object.

Abstract: A light-emitting diode apparatus and a control method of the light-emitting diode apparatus are provided. The control method includes: applying a pre-reset voltage to a control terminal of a driving transistor of the light-emitting diode apparatus in a pre-resetting stage to pre-reset the control terminal of the driving transistor; resetting the control terminal of the driving transistor of the light-emitting diode apparatus by using a reset voltage source in a first resetting stage; compensating the control terminal of the driving transistor to a compensation voltage in a compensation stage; and providing, by the driving transistor, a driving current in a light emission stage to drive a light-emitting diode of the light-emitting diode apparatus to emit light.

Abstract: An object detection method, an electronic apparatus and an object detection system are provided. The method is adapted to the electronic apparatus and includes the following steps. A first image is obtained. A geometric transformation operation is performed on the first image to obtain at least one second image. The first image and the at least one second image are combined to generate a combination image. The combination image including the first image and the at least one second image is inputted into a trained deep learning model to detect a target object.

Abstract: A posture determination method applicable to an electronic system including an image capturing device is provided. The image capturing device is set up corresponding to a target. The posture determination method includes: acquiring a plurality of consecutive images captured by the image capturing device; performing a motion detection on the consecutive images; determining whether an image content of the consecutive images is static after a movement according to a detection result of the motion detection; and determining a posture of the target when the image content is static after the movement. In addition, the electronic system and a non-transitory computer-readable recording medium using the method are also provided.

Abstract: Embodiments described provide dynamic imaging systems that compensates for pattern defects resulting from distortion caused by warpage of the substrate. The methods and apparatus described are useful to create compensated exposure patterns. The dynamic imaging system includes an inspection system configured to provide 3D profile measurements and die shift measurements of the first substrate to the interface configured to provide compensated pattern data to the digital lithography system configured to receive the compensated pattern data from the interface and expose the photoresist with a compensated pattern.

Abstract: Embodiments herein beneficially enable simultaneous processing of a plurality of substrates in a digital direct write lithography processing system. In one embodiment a method of processing a plurality of substrate includes positioning a plurality of substrates on a substrate carrier of a processing system, positioning the substrate carrier under the plurality of optical modules, independently leveling each of the plurality of substrates, determining offset information for each of the plurality of substrates, generating patterning instructions based on the offset information for each of the plurality of substrates, and patterning each of the plurality of substrates using the plurality of optical modules. The processing system comprises a base, a motion stage disposed on the base, the substrate carrier disposed on the motion stage, a bridge disposed above a surface of the base and separated therefrom, and a plurality of optical modules disposed on the bridge.

Abstract: Embodiments described provide dynamic imaging systems that compensates for pattern defects resulting from distortion caused by warpage of the substrate. The methods and apparatus described are useful to create compensated exposure patterns. The dynamic imaging system includes an inspection system configured to provide 3D profile measurements and die shift measurements of the first substrate to the interface configured to provide compensated pattern data to the digital lithography system configured to receive the compensated pattern data from the interface and expose the photoresist with a compensated pattern.

Abstract: Embodiments described provide dynamic imaging systems that compensates for pattern defects resulting from distortion caused by warpage of the substrate. The methods and apparatus described are useful to create compensated exposure patterns. The dynamic imaging system includes an inspection system configured to provide 3D profile measurements and die shift measurements of the first substrate to the interface configured to provide compensated pattern data to the digital lithography system configured to receive the compensated pattern data from the interface and expose the photoresist with a compensated pattern.