Patents by Inventor Shih-Hao Su

Shih-Hao Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160172190
    Abstract: A gate oxide formation process includes the following steps. A first gate oxide layer is formed on a substrate. The first gate oxide layer is thinned to a first predetermined thickness. The first gate oxide layer is then thickened to a second predetermined thickness, to thereby form a second gate oxide layer.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 16, 2016
    Inventors: Hung-Lin Shih, Chueh-Yang Liu, Shao-Wei Wang, Che-Hung Huang, Po-Hua Jen, Shih-Hao Su
  • Patent number: 8841181
    Abstract: A method for fabricating a semiconductor device is described. A gate layer, a C-doped first protective layer and a hard mask layer are formed on a substrate and then patterned to form a first stack in a first area and a second stack in a second area. A second protective layer is formed on the sidewalls of the first and the second stacks. A blocking layer is formed in the first area and a first spacer formed on the sidewall of the second protective layers on the sidewall of the second stack in the second area. A semiconductor compound is formed in the substrate beside the first spacer. The blocking layer and the first spacer are removed. The hard mask layer in the first stack and the second stack is removed.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: September 23, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Ying-Hung Chou, Shao-Hua Hsu, Chi-Horn Pai, Zen-Jay Tsai, Shih-Hao Su, Chun-Chia Chen, Shih-Chieh Hsu, Chih-Chung Chen
  • Patent number: 8709930
    Abstract: A semiconductor process is provided. The prior steps include: a first gate including a first cap layer and a second gate including a second cap layer are formed on a substrate. A hard mask layer is formed to cover the first gate and the second gate. The material of the hard mask layer is different from the material of the first cap layer and the second cap layer. The hard mask layer is removed entirely after a lithography process and an etching process are performed. The following steps include: a material is formed to entirely cover the first gate and the second gate. The material, the first gate and the second gate are etched back to make the first gate and the second gate have the same level and expose layers in both of them.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: April 29, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Zen-Jay Tsai, Shao-Hua Hsu, Chi-Horn Pai, Ying-Hung Chou, Shih-Hao Su, Shih-Chieh Hsu, Chih-Ho Wang, Hung-Yi Wu, Shui-Yen Lu
  • Publication number: 20130234216
    Abstract: A method for fabricating a semiconductor device is described. A gate layer, a C-doped first protective layer and a hard mask layer are formed on a substrate and then patterned to form a first stack in a first area and a second stack in a second area. A second protective layer is formed on the sidewalls of the first and the second stacks. A blocking layer is formed in the first area and a first spacer formed on the sidewall of the second protective layers on the sidewall of the second stack in the second area. A semiconductor compound is formed in the substrate beside the first spacer. The blocking layer and the first spacer are removed. The hard mask layer in the first stack and the second stack is removed.
    Type: Application
    Filed: March 7, 2012
    Publication date: September 12, 2013
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ying-Hung Chou, Shao-Hua Hsu, Chi-Horn Pai, Zen-Jay Tsai, Shih-Hao Su, Chun-Chia Chen, Shih-Chieh Hsu, Chih-Chung Chen
  • Publication number: 20130137256
    Abstract: A semiconductor process is provided. The prior steps include: a first gate including a first cap layer and a second gate including a second cap layer are formed on a substrate. A hard mask layer is formed to cover the first gate and the second gate. The material of the hard mask layer is different from the material of the first cap layer and the second cap layer. The hard mask layer is removed entirely after a lithography process and an etching process are performed. The following steps include: a material is formed to entirely cover the first gate and the second gate. The material, the first gate and the second gate are etched back to make the first gate and the second gate have the same level and expose layers in both of them.
    Type: Application
    Filed: November 25, 2011
    Publication date: May 30, 2013
    Inventors: Zen-Jay Tsai, Shao-Hua Hsu, Chi-Horn Pai, Ying-Hung Chou, Shih-Hao Su, Shih-Chieh Hsu, Chih-Ho Wang, Hung-Yi Wu, Shui-Yen Lu