Patents by Inventor Shih-Hao Tsai
Shih-Hao Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11949056Abstract: The light emitting diode packaging structure includes a flexible substrate, a first adhesive layer, micro light emitting elements, a conductive pad, a redistribution layer, and an electrode pad. The first adhesive layer is disposed on the flexible substrate. The micro light emitting elements are disposed on the first adhesive layer and have a first surface facing to the first adhesive layer and an opposing second surface. The micro light emitting elements include a red micro light emitting element, a blue micro light emitting element, and a green micro light emitting element. The conductive pad is disposed on the second surface of the micro light emitting element. The redistribution layer covers the micro light emitting elements and the conductive pad. The electrode pad is disposed on the redistribution layer and is electrically connected to the circuit layer. A thickness of the flexible substrate is less than 100 um.Type: GrantFiled: April 20, 2023Date of Patent: April 2, 2024Assignee: Lextar Electronics CorporationInventors: Chih-Hao Lin, Jo-Hsiang Chen, Shih-Lun Lai, Min-Che Tsai, Jian-Chin Liang
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Publication number: 20240089607Abstract: An image sensing device and a control device of an illumination device thereof are provided. The control device includes a control circuit, an operation circuit, and multiple driving signal generators. The control circuit generates multiple control signals. The operation circuit performs a logical operation on the control signals and an image capturing signal to generate multiple operation results. The driving signal generator respectively provides multiple driving signals to the illumination device according to the operation results, and the driving signals respectively have multiple different output powers.Type: ApplicationFiled: May 29, 2023Publication date: March 14, 2024Applicant: HTC CorporationInventors: Chao Shuan Huang, Sheng-Long Wu, Yu-Jui Hsu, Shih-Yao Tsai, Tun-Hao Chao, Sen-Lin Chung, Chih Pin Chung, Chih-Yuan Chien, Shih Hong Sun
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Publication number: 20240088050Abstract: A semiconductor device includes a die, an encapsulant over a front-side surface of the die, a redistribution structure on the encapsulant, a thermal module coupled to the back-side surface of the die, and a bolt extending through the redistribution structure and the thermal module. The die includes a chamfered corner. The bolt is adjacent to the chamfered corner.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Inventors: Chen-Hua Yu, Wei-Kang Hsieh, Shih-Wei Chen, Tin-Hao Kuo, Hao-Yi Tsai
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Patent number: 11923315Abstract: Semiconductor package includes a pair of dies, a redistribution structure, and a conductive plate. Dies of the pair of dies are disposed side by side. Each die includes a contact pad. Redistribution structure is disposed on the pair of dies, and electrically connects the pair of dies. Redistribution structure includes an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. Innermost dielectric layer is closer to the pair of dies. Redistribution conductive layer extends between the innermost dielectric layer and the outermost dielectric layer. Outermost dielectric layer is furthest from the pair of dies. Conductive plate is electrically connected to the contact pads of the pair of dies. Conductive plate extends over the outermost dielectric layer of the redistribution structure and over the pair of dies. Vertical projection of the conductive plate falls on spans of the dies of the pair of dies.Type: GrantFiled: July 12, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang, Wei-Ting Chen, Chien-Hsun Chen, Shih-Ya Huang
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Publication number: 20240072816Abstract: A digital-to-analog converter and an operation method thereof are provided. The digital-to-analog converter includes a current source module, a decoder, a change indicator, and a random number generator. The decoder is coupled to the current source module and receives a digital input signal. The change indicator is coupled to the decoder and provides an indication signal to the decoder. The random number generator is coupled to the change indicator and provides a random number signal to the change indicator. The change indicator generates an indication signal according to the random number signal, and the decoder generates a control signal to the current source module according to the digital input signal and the indication signal, so that the current source module generates an analog output signal corresponding to the digital input signal according to the control signal.Type: ApplicationFiled: November 21, 2022Publication date: February 29, 2024Applicants: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Hao Wang, Hui-Wen Tsai, Shih-Chun Lo
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Publication number: 20240071909Abstract: A semiconductor package is provided. The semiconductor package includes an encapsulating layer, a semiconductor die formed in the encapsulating layer, and an interposer structure covering the encapsulating layer. The interposer structure includes an insulating base having a first surface facing the encapsulating layer, and a second surface opposite the first surface. The interposer structure also includes insulating features formed on the first surface of the insulating base and extending into the encapsulating layer. The insulating features is arranged in a matrix and faces a top surface of the semiconductor die. The interposer structure further includes first conductive features formed on the first surface of the insulating base and extending into the encapsulating layer. The first conductive features surround the matrix of the insulating features.Type: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Wen WU, Techi WONG, Po-Hao TSAI, Po-Yao CHUANG, Shih-Ting HUNG, Shin-Puu JENG
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Patent number: 11145604Abstract: A semiconductor structure, integrated circuit device, and method of forming semiconductor structure are provided. In various embodiments, the semiconductor structure includes a substrate containing a high topography region and a low topography region, an outer protection wall on an outer peripheral portion of the high topography region next to the low topography region, and an anti-reflective coating over the outer protection wall, the high topography region, and the low topography region.Type: GrantFiled: January 13, 2020Date of Patent: October 12, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Hsien Ma, Haw-Chuan Wu, Shih-Hao Tsai, Yu-Chuan Lin
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Publication number: 20200152583Abstract: A semiconductor structure, integrated circuit device, and method of forming semiconductor structure are provided. In various embodiments, the semiconductor structure includes a substrate containing a high topography region and a low topography region, an outer protection wall on an outer peripheral portion of the high topography region next to the low topography region, and an anti-reflective coating over the outer protection wall, the high topography region, and the low topography region.Type: ApplicationFiled: January 13, 2020Publication date: May 14, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Hsien MA, Haw-Chuan WU, Shih-Hao TSAI, Yu-Chuan LIN
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Patent number: 10535613Abstract: A semiconductor structure, integrated circuit device, and method of forming semiconductor structure are provided. In various embodiments, the semiconductor structure includes a substrate containing a high topography region and a low topography region, an outer protection wall on an outer peripheral portion of the high topography region next to the low topography region, and an anti-reflective coating over the outer protection wall, the high topography region, and the low topography region.Type: GrantFiled: February 9, 2018Date of Patent: January 14, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Hsien Ma, Haw-Chuan Wu, Shih-Hao Tsai, Yu-Chuan Lin
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Publication number: 20180166395Abstract: A semiconductor structure, integrated circuit device, and method of forming semiconductor structure are provided. In various embodiments, the semiconductor structure includes a substrate containing a high topography region and a low topography region, an outer protection wall on an outer peripheral portion of the high topography region next to the low topography region, and an anti-reflective coating over the outer protection wall, the high topography region, and the low topography region.Type: ApplicationFiled: February 9, 2018Publication date: June 14, 2018Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Hsien MA, Haw-Chuan WU, Shih-Hao TSAI, Yu-Chuan LIN
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Patent number: 9893019Abstract: A semiconductor structure, integrated circuit device, and method of forming semiconductor structure are provided. In various embodiments, the semiconductor structure includes a substrate containing a high topography region and a low topography region, an outer protection wall on an outer peripheral portion of the high topography region next to the low topography region, and an anti-reflective coating over the outer protection wall, the high topography region, and the low topography region.Type: GrantFiled: September 15, 2015Date of Patent: February 13, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Hsien Ma, Haw-Chuan Wu, Shih-Hao Tsai, Yu-Chuan Lin
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Publication number: 20170077224Abstract: A semiconductor structure, integrated circuit device, and method of forming semiconductor structure are provided. In various embodiments, the semiconductor structure includes a substrate containing a high topography region and a low topography region, an outer protection wall on an outer peripheral portion of the high topography region next to the low topography region, and an anti-reflective coating over the outer protection wall, the high topography region, and the low topography region.Type: ApplicationFiled: September 15, 2015Publication date: March 16, 2017Inventors: Shih-Hsien MA, Haw-Chuan WU, Shih-Hao TSAI, Yu-Chuan LIN
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Patent number: 7505291Abstract: An AC/DC converter includes a rectifier circuit, at least one restraining unit, and a power interruption detection circuit. The rectifier circuit is used for converting an AC (alternating current) to a DC (direct current) power source. The restraining unit is connected to an output terminal of the AC power supply. The restraining unit includes a resistor and a switch connected in parallel. The power interruption detection circuit detects whether an input power cycle is regular. When the input power cycle is interruptive, a signal is generated to change a state of the switch in the restraining unit to make the resistor of the interfere in the circuit to restrain an inrush current in any operational circumstance, such as warm startup or quick startup.Type: GrantFiled: February 17, 2006Date of Patent: March 17, 2009Assignee: Acbel Polytech Inc.Inventors: Jin-Biau Wang, Jacob Teng, Hung-Tao Lee, Kuen-Lung Tsai, Han-Wei Chen, Shih-Hao Tsai, Ming-Yung Peng
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Publication number: 20070053215Abstract: An AC/DC converter includes a rectifier circuit, at least one restraining unit, and a power interruption detection circuit. The rectifier circuit is used for converting an AC (alternating current) to a DC (direct current) power source. The restraining unit is connected to an output terminal of the AC power supply. The restraining unit includes a resistor and a switch connected in parallel. The power interruption detection circuit detects whether an input power cycle is regular. When the input power cycle is interruptive, a signal is generated to change a state of the switch in the restraining unit to make the resistor of the interfere in the circuit to restrain an inrush current in any operational circumstance, such as warm startup or quick startup.Type: ApplicationFiled: February 17, 2006Publication date: March 8, 2007Inventors: Jin-Biau Wang, Jacob Teng, Hung-Tao Lee, Kuen-Lung Tsai, Han-Wei Chen, Shih-Hao Tsai, Ming-Yung Peng