Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: An interconnect fabrication method is disclosed herein that utilizes a disposable etch stop hard mask over a gate structure during source/drain contact formation and replaces the disposable etch stop hard mask with a dielectric feature (in some embodiments, dielectric layers having a lower dielectric constant than a dielectric constant of dielectric layers of the disposable etch stop hard mask) before gate contact formation. An exemplary device includes a contact etch stop layer (CESL) having a first sidewall CESL portion and a second sidewall CESL portion separated by a spacing and a dielectric feature disposed over a gate structure, where the dielectric feature and the gate structure fill the spacing between the first sidewall CESL portion and the second sidewall CESL portion. The dielectric feature includes a bulk dielectric over a dielectric liner. The dielectric liner separates the bulk dielectric from the gate structure and the CESL.

Abstract: A method of fabricating a contact structure includes the following steps. An opening is formed in a dielectric layer. A conductive material layer is formed within the opening and on the dielectric layer, wherein the conductive material layer includes a bottom section having a first thickness and a top section having a second thickness, the second thickness is greater than the first thickness. A first treatment is performed on the conductive material layer to form a first oxide layer on the bottom section and on the top section of the conductive material layer. A second treatment is performed to remove at least portions of the first oxide layer and at least portions of the conductive material layer, wherein after performing the second treatment, the bottom section and the top section of the conductive material layer have substantially equal thickness.

Abstract: A semiconductor structure and the manufacturing method thereof are disclosed. An exemplary semiconductor structure includes a first source/drain contact and a second source/drain contact spaced apart by a gate structure, an etch stop layer (ESL) over the first source/drain contact and the second source/drain contact, a conductive feature disposed in the etch stop layer and in direct contact with the first source/drain contact and the second source/drain contact, a dielectric layer over the etch stop layer, and a contact via extending through the dielectric layer and electrically connected to the conductive feature. By providing the conductive feature, a number of metal lines in an interconnect structure of the semiconductor structure may be advantageously reduced.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: The technology provides for a power line communication system capable of providing data from a first device to a second device over a power line. The first device may include a set of contacts and a second device may include a second set of contacts. The second set of contacts may be adapted to electronically engage with the first set of contacts of the first device to form at least a power and ground lines connection. Circuitry within the first device and the second device may include circuitry for providing data over the power line connection between the first device and the second device. The circuitry may comprise a power line, a ground line, a transmitter line carrying data signals, a capacitor coupling the transmitter line to the power line at a connection point, and a receiver comprising two field effect transistors.

Abstract: A memory chip includes a first decoding device and a memory device. The first decoding device is configured to generate multiple word line signals. The memory device is configured to generate a third data signal based on a first data signal and a second data signal. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit is configured to generate the first data signal at a first node according to the word line signals during a first period. The second memory circuit is configured to generate the second data signal at a second node different from the first node according to the word line signals during a second period after the first period. A method of operating a memory chip is also disclosed herein.

Abstract: The technology provides for a power line communication system capable of providing data from a first device to a second device over a power line. The first device may include a set of contacts and a second device may include a second set of contacts. The second set of contacts may be adapted to electronically engage with the first set of contacts of the first device to form at least a power and ground lines connection. Circuitry within the first device and the second device may include circuitry for providing data over the power line connection between the first device and the second device. The circuitry may comprise a power line, a ground line, a transmitter line carrying data signals, a capacitor coupling the transmitter line to the power line at a connection point, and a receiver comprising two field effect transistors.

Abstract: A memory chip includes a first decoding device and a memory device. The first decoding device is configured to generate multiple word line signals. The memory device is configured to generate a third data signal based on a first data signal and a second data signal. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit is configured to generate the first data signal at a first node according to the word line signals during a first period. The second memory circuit is configured to generate the second data signal at a second node different from the first node according to the word line signals during a second period after the first period. A method of operating a memory chip is also disclosed herein.

Abstract: The disclosure provides a light detection device and a detection method for controlling a light source device. The light detection device includes a detection panel and a processor. The detection panel converts an input light from the light source device into a converted light and converts the converted light into a charge. The processor selects a first region and a second region other than the first region from the detection panel. A first charge of the converted light received by at least one first pixel of the first region during a first period is used to detect a dose of the input light. A second charge of the converted light received by the second region during the first period is used to generate a data image. The charge of the converted light received by at least one first pixel during a second period is used to generate the data image.

Abstract: The present disclosure provides systems and methods for activating a general purpose input/out (“GPIO”) pin. The system may include a control device, agency device, and a controlled device. The agency device may be part of the controlled device or it may be a separate device. The agency device may receive a communication signal transmitted from the control device. The agency device may count the number of pulses during a certain period of time to determine a GPIO pin to trigger on the controlled device.

Abstract: An earphone device includes a speaker unit, an inner housing body and an outer housing body. The inner housing body covers the speaker unit through an insert molding technique. The outer housing body covers the inner housing body through the insert molding technique.

Abstract: A memory chip includes a first decoding device and a memory device. The first decoding device is configured to generate multiple word line signals. The memory device is configured to generate a third data signal based on a first data signal and a second data signal. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit is configured to generate the first data signal at a first node according to the word line signals during a first period. The second memory circuit is configured to generate the second data signal at a second node different from the first node according to the word line signals during a second period after the first period. A method of operating a memory chip is also disclosed herein.

Abstract: A speaker device includes a housing body, a speaker driver and a passive radiator. The housing body is formed with a first sound hole and a second sound hole respectively opening in two opposite directions. The speaker driver is disposed in the housing body, is located adjacent to the first sound hole, and is adapted to generate sound. The passive radiator is disposed in the housing body, is located adjacent to the second sound hole, and is adapted to generate sound. The first sound hole and the second sound hole are adapted for respectively allowing the sound generated by the speaker driver and the sound generated by the passive radiator to travel out from the housing body respectively in two opposite directions therethrough.

Abstract: A passive diaphragm assembly includes a counterweight member, a first diaphragm and a second diaphragm. The first diaphragm and the second diaphragm are spaced apart from each other, are connected respectively to opposite ends of the counterweight member, and cooperate with the counterweight member to define an air space thereamong.

Abstract: The technology provides for a power line communication system capable of providing data from a first device to a second device over a power line. The first device may include a set of contacts and a second device may include a second set of contacts. The second set of contacts may be adapted to electronically engage with the first set of contacts of the first device to form at least a power and ground lines connection. Circuitry within the first device and the second device may include circuitry for providing data over the power line connection between the first device and the second device. The circuitry may comprise a power line, a ground line, a transmitter line carrying data signals, a capacitor coupling the transmitter line to the power line at a connection point, and a receiver comprising two field effect transistors.

Abstract: A passive diaphragm assembly includes a counterweight member, a first diaphragm and a second diaphragm. The first diaphragm and the second diaphragm are spaced apart from each other, are connected respectively to opposite ends of the counterweight member, and cooperate with the counterweight member to define an air space thereamong.

Abstract: A speaker device includes a housing body, a speaker driver and a passive radiator. The housing body is formed with a first sound hole and a second sound hole respectively opening in two opposite directions. The speaker driver is disposed in the housing body, is located adjacent to the first sound hole, and is adapted to generate sound. The passive radiator is disposed in the housing body, is located adjacent to the second sound hole, and is adapted to generate sound. The first sound hole and the second sound hole are adapted for respectively allowing the sound generated by the speaker driver and the sound generated by the passive radiator to travel out from the housing body respectively in two opposite directions therethrough.

Abstract: An earphone device includes a speaker unit, an inner housing body and an outer housing body. The inner housing body covers the speaker unit through an insert molding technique. The outer housing body covers the inner housing body through the insert molding technique.

Abstract: An image processing method includes setting a detection panel with an active region, acquiring raw image data by using the detection panel, partitioning the active region into a first region and a second region, discharging at least a part of the electrical charges in the first region by using a particular scanning process, acquiring calibration data through the detection panel, and calibrating the raw image data to generate calibrated image data according to the calibration data.