Abstract: A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.

Abstract: In a method of cleaning a lithography system, during idle mode, a stream of air is directed, through a first opening, into a chamber of a wafer table of an EUV lithography system. One or more particles is extracted by the directed stream of air from surfaces of one or more wafer chucks in the chamber of the wafer table. The stream of air and the extracted one or more particle are drawn, through a second opening, out of the chamber of the wafer table.

Abstract: An integrated circuit includes a first-type active-region structure, a second-type active-region structure on a substrate, and a plurality of gate-conductors. The integrated circuit also includes a backside horizontal conducting line in a backside first conducting layer below the substrate, a backside vertical conducting line in a backside second conducting layer below the backside first conducting layer, and a pin-connector for a circuit cell. The pin-connector is directly connected between the backside horizontal conducting line and the backside vertical conducting line. The backside horizontal conducting line extends across a vertical boundary of the circuit cell.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A switch device includes a P-type substrate, a first gate structure, a first N-well, a shallow trench isolation structure, a first P-well, a second gate structure, a first N-type doped region, a second P-well, and a second N-type doped region. The first N-well is formed in the P-type substrate and partly under the first gate structure. The shallow trench isolation structure is formed in the first N-well and under the first gate structure. The first P-well is formed in the P-type substrate and under the first gate structure. The first N-type doped region is formed in the P-type substrate and between the first gate structure and the second gate structure. The second P-well is formed in the P-type substrate and under the second gate structure. The second N-type doped region is formed in the second P-well and partly under the second gate structure.

Abstract: The present invention discloses an expansion tank comprises an upper barrel, a plastic lining and a leak-proof padding located in the upper barrel. The plastic lining has a first groove facing the upper barrel and a top surface located around the first groove. The first groove is covered by the upper barrel; the top surface abuts on the upper barrel, and the leak-proof padding is stuffed in the first groove of the plastic lining.

Abstract: The present invention discloses an expansion tank comprises an upper barrel, a plastic lining and a leak-proof padding located in the upper barrel. The plastic lining has a first groove facing the upper barrel and a top surface located around the first groove. The first groove is covered by the upper barrel; the top surface abuts on the upper barrel, and the leak-proof padding is stuffed in the first groove of the plastic lining.

Abstract: The present invention discloses a feedback circuit capable of regulating response according to variation of dimming signal, comprising an error amplifier unit, a bandwidth regulating unit and an optical coupler. This feedback circuit is applied in an LED illumination apparatus comprising a plurality of LED components, an LED driver, a PWM controller, and a dimming circuit unit. When the LED driver and the dimming circuit unit normally work, the bandwidth regulating unit produces an electrical resistance for regulating a feedback signal provided by the error amplifier unit according to a dimming signal of the dimming circuit unit. Therefore, the regulated feedback signal is outputted by the optical coupler for making the PWM controller correspondingly generates a controlling signal to adaptively regulate bandwidth of the LED driver, so as to attenuate an audible noise produced by the LED driver due to instability of the response.

Abstract: A flat panel display device includes an image processing circuit, a power supply, and a gamma voltage generator. The image processing circuit receives grayscale data, identifies a range in which a gray level of the grayscale data is located, and generates a reference signal based on the range. The power supply supplies a drive voltage based on the reference signal. The gamma voltage generator generates a set of gamma voltages based on the drive voltage.

Abstract: An exemplary liquid crystal display (LCD) panel includes scan lines, data lines, a scan driver connected to the scan lines, a data driver connected to the data lines, a controller connected to the scan driver and the data driver, and pixels formed by the scan lines and the data lines. The LCD panel is divided into five detecting regions, and the first detecting region is in a center of the LCD panel, and others surround the center portion of the LCD panel. Each detecting region includes a photo sensor. The controller is used to control the five detecting regions to have substantially the same flicker level.

Abstract: NVM arrays include rows and columns of NVM cells comprising a floating gate and a four transistor storage element. Supply voltage for selected storage elements is turned off during a programming and an erase mode. Isolation transistors for each NVM cell or for each row of NVM cells may be used to control the supply voltage.

Abstract: A flat panel display device includes an image processing circuit, a power supply, and a gamma voltage generator. The image processing circuit receives grayscale data, identifies a range in which a gray level of the grayscale data is located, and generates a reference signal based on the range. The power supply supplies a drive voltage based on the reference signal. The gamma voltage generator generates a set of gamma voltages based on the drive voltage.

Abstract: An exemplary liquid crystal display (LCD) panel includes scan lines, data lines, a scan driver connected to the scan lines, a data driver connected to the data lines, a controller connected to the scan driver and the data driver, and pixels formed by the scan lines and the data lines. The LCD panel is divided into five detecting regions, and the first detecting region is in a center of the LCD panel, and others surround the center portion of the LCD panel. Each detecting region includes a photo sensor. The controller is used to control the five detecting regions to have substantially the same flicker level.