Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.

Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.

Abstract: A semiconductor device is provided. The semiconductor device comprises a first semiconductor die comprising a first capacitor, and a second semiconductor die in contact with the first semiconductor die and comprises a diode. The first semiconductor die and the second semiconductor die are arranged along a first direction, and a diode is configured to direct electrons accumulated at the first capacitor to a ground.

Abstract: A solid state device for a computer system is disclosed. The computer system includes a detecting module for detecting a connection state of a connector of a backplane of the computer system. The solid state device includes a memory module, configured to store data; a connection module, configured to connect the connector of the backplane of the computer system; and a controller module, coupled to the memory module and the connection module, configured to write data into the memory module according to a writing notification from the computer system when the connection state between the connection module and the connector of the computer system is changed from a first connection state to a second connection state, and to notify the computer system to unlock the connector of the computer system after finishing writing the data.

Abstract: A solid state device for a computer system is disclosed. The computer system includes a detecting module for detecting a connection state of a connector of a backplane of the computer system. The solid state device includes a memory module, configured to store data; a connection module, configured to connect the connector of the backplane of the computer system; and a controller module, coupled to the memory module and the connection module, configured to write data into the memory module according to a writing notification from the computer system when the connection state between the connection module and the connector of the computer system is changed from a first connection state to a second connection state, and to notify the computer system to unlock the connector of the computer system after finishing writing the data.

Abstract: A signal tuning method for a peripheral component interconnect express (PCIe) includes assigning a first signal setting to the PCIe to generate a first PCIe signal, and tuning a link by the first PCIe signal, and determining whether to assign a second signal setting to the PCIe according to a signal status of the link, for generating a second PCIe signal to tune the link; wherein the PCIe is connected to a plurality of electronic devices via the link.

Abstract: A signal tuning method for a peripheral component interconnect express (PCIe) includes assigning a first signal setting to the PCIe to generate a first PCIe signal, and tuning a link by the first PCIe signal, and determining whether to assign a second signal setting to the PCIe according to a signal status of the link, for generating a second PCIe signal to tune the link; wherein the PCIe is connected to a plurality of electronic devices via the link.

Abstract: The present invention provides a scheduling method for a peripheral component interconnect express (PCIe) switch of an electronic system. The PCIe switch is utilized for handling input/output requests of a host of the electronic system. The scheduling method includes the PCIe switch determining a scheduling sequence of message signal interrupts (MSIs) and read/write requests corresponding to the input/output requests according to amount of the message signal interrupts corresponding to the input/output requests; and the PCIe switch handling the message signal interrupts and the read/write requests according to the scheduling sequence.

Abstract: The present invention provides a scheduling method for a peripheral component interconnect express (PCIe) switch of an electronic system. The PCIe switch is utilized for handling input/output requests of a host of the electronic system. The scheduling method includes the PCIe switch determining a scheduling sequence of message signal interrupts (MSIs) and read/write requests corresponding to the input/output requests according to amount of the message signal interrupts corresponding to the input/output requests; and the PCIe switch handling the message signal interrupts and the read/write requests according to the scheduling sequence.

Abstract: A tent wind rope adjusting structure includes: an adjusting plate, having a plate body, with a front section and a rear section of the plate body provided each with a through hole, a side of the adjusting plate is provided with at least a hook, the hook is formed by cutting a notch at a side of the plate body, and having a hook opening and an indent portion; a wind rope, passing through the two through holes of the adjusting plate, with a tail end of the wind rope provided with a rope loop; and an elastic clip buckle, having a press-able rope clipping hole for the wind rope to pass through, to allow the elastic clip buckle to move between a rear section of the wind rope and the adjusting plate.

Abstract: A method for updating software in a storage system is provided. The method is used in the storage system and includes: providing a new region in a random access memory (RAM); downloading second software to the new region and running the second software; determining whether data path settings have been initialized; and setting the new region as an active region and setting a current active region in the RAM as the new region when determining that the data path settings are initialized.

Abstract: The present disclosure discloses a data storage system and a control method thereof. The data storage system includes a plurality of data storage devices, a temporary memory device and an expander. The control method includes: detecting, by the expander, if a flag is in a first status after the expander is restarted; sending, by the expander, a first command to all the data storage devices if the first status is detected. The first status indicates that all the data storage devices are ready for linking and operation.

Abstract: A method for preparing an inorganic nano-material is provided. The method includes steps of providing a first solution including plural metal ions; mixing the first solution with a surfactant and adding a reduction agent to generate a second solution, wherein the second solution generates plural metal atoms reduced from the plural metal ions; and adding an oxidation agent into the second solution for oxidizing the plural metal atoms so as to generate plural metal oxides and form the inorganic nano-material.

Abstract: The present disclosure discloses a data storage system and a control method thereof. The data storage system includes a plurality of data storage devices, a temporary memory device and an expander. The control method includes: detecting, by the expander, if a flag is in a first status after the expander is restarted; sending, by the expander, a first command to all the data storage devices if the first status is detected. The first status indicates that all the data storage devices are ready for linking and operation.

Abstract: A method for preparing an inorganic nano-material is provided. The method includes steps of providing a first solution including plural metal ions; mixing the first solution with a surfactant and adding a reduction agent to generate a second solution, wherein the second solution generates plural metal atoms reduced from the plural metal ions; and adding an oxidation agent into the second solution for oxidizing the plural metal atoms so as to generate plural metal oxides and form the inorganic nano-material.

Abstract: Faults occurring in the operation of a rapid thermal process system are detected and dynamically controlled in-situ. A data set is generated which represents the power applied to heating elements which are spatially arranged in a plurality of zones. The data is converted to a sequence of fractions respectively representing the power applied to each zone relative to the total applied power. The fractions are sequentially arranged and a least squares straight line fit for the fractions is calculated. The slope of the calculated straight line fit is used in a statistical process control system to determine whether a fault has occurred, and to make appropriate corrections in process control parameters, such as the length of time the process is carried out.

Abstract: A novel process for isolating devices on a semiconductor substrate is disclosed. An isolation layer is first formed over the semiconductor substrate and patterned into at least two isolation mesas on the substrate. Next, a blanket semiconductor layer is formed over the substrate with a thickness sufficient to cover the isolation mesas. The semiconductor layer is subjected to planarization until the isolation mesas are exposed, thus resulting in a semiconductor region between the two isolation mesas to serve as an active region for semiconductor devices.