Patents by Inventor Shih-Hung Hsieh

Shih-Hung Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929431
    Abstract: A high electron mobility transistor includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A shallow recess, a first deep recess and a second deep recess are disposed in the second III-V compound layer. The first deep recess and the second deep recess are respectively disposed at two sides of the shallow recess. The source electrode fills in the first deep recess and contacts the top surface of the first III-V compound layer. A drain electrode fills in the second deep recess and contacts the top surface of the first III-V compound layer. The shape of the source electrode and the shape of the drain electrode are different from each other. A gate electrode is disposed on the shallow recess.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: March 12, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai
  • Publication number: 20240072097
    Abstract: A method for fabricating a semiconductor device includes the steps of providing a first wafer and a second wafer as the first wafer includes a device wafer and the second wafer includes a blanket wafer, bonding the first wafer and the second wafer, performing a thermal treatment process to separate the second wafer into a first portion and a second portion, and then planarizing the first portion.
    Type: Application
    Filed: September 26, 2022
    Publication date: February 29, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai
  • Patent number: 11579795
    Abstract: A control method for a solid state drive is provided. The solid state drive includes a non-volatile memory with plural blocks. In a step (a1), a block is opened. In a step (a2), a program action is performed to store a valid write data into the open block. Then, a step (a3) is performed to judge whether an amount of the valid write data in the open block reaches a predetermined capacity. In a step (a4), if the amount of the valid write data in the open block does not reach the predetermined capacity, the step (a2) is performed again. In a step (a5), if the amount of the valid write data in the open block reaches the predetermined capacity, the open block is closed and the step (a1) is performed again. The predetermined capacity is lower than a capacity of one block.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: February 14, 2023
    Assignee: SOLID STATE STORAGE TECHNOLOGY CORPORATION
    Inventors: Shih-Hung Hsieh, Hsuan-Yi Chiang, Shi-Xuan Chen, Tzu-Chieh Lin
  • Publication number: 20220236906
    Abstract: A control method for a solid state drive is provided. The solid state drive includes a non-volatile memory with plural blocks. In a step (a1), a block is opened. In a step (a2), a program action is performed to store a valid write data into the open block. Then, a step (a3) is performed to judge whether an amount of the valid write data in the open block reaches a predetermined capacity. In a step (a4), if the amount of the valid write data in the open block does not reach the predetermined capacity, the step (a2) is performed again. In a step (a5), if the amount of the valid write data in the open block reaches the predetermined capacity, the open block is closed and the step (a1) is performed again. The predetermined capacity is lower than a capacity of one block.
    Type: Application
    Filed: March 8, 2021
    Publication date: July 28, 2022
    Inventors: Shih-Hung HSIEH, Hsuan-Yi CHIANG, Shi-Xuan CHEN, Tzu-Chieh LIN
  • Patent number: 11079965
    Abstract: A data processing method for a computer system is provided. The computer system includes a host and an open-channel solid state drive. The open-channel solid state drive is connected with the host. The data processing method includes the following steps. Firstly, plural block characteristic parameters of a specified block in a non-volatile memory of the open-channel solid state drive are collected. Then, the plural block characteristic parameters are inputted into a prediction function, so that a prediction value is acquired. If the prediction value exceeds a threshold value, a data in the specified block of the non-volatile memory is moved to a blank block of the non-volatile memory by the host.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: August 3, 2021
    Assignee: SOLID STATE STORAGE TECHNOLOGY CORPORATION
    Inventors: Shih-Hung Hsieh, Yu-Cheng Kao, Sung-Hung Wu, I-Hsiang Chiu
  • Publication number: 20210117125
    Abstract: A server system includes at least one server. The server comprises a processing circuit and plural solid state drives. The plural solid state drives are connected with the processing circuit. A first solid state drive of the plural solid state drives includes a control circuit and a non-volatile memory. The control circuit is connected with the processing circuit. The non-volatile memory is connected with the control circuit. The control circuit includes a prediction model. The prediction model predicts a life time of the first solid state drive. If the prediction model predicts that the first solid state drive will be damaged in a specified time, the control circuit issues a critical warning signal to the processing circuit.
    Type: Application
    Filed: November 5, 2019
    Publication date: April 22, 2021
    Inventors: Shih-Hung HSIEH, Yu-Cheng KAO, I-Hsiang CHIU, Chun-Ting LEE
  • Publication number: 20200387327
    Abstract: A data processing method for a computer system is provided. The computer system includes a host and an open-channel solid state drive. The open-channel solid state drive is connected with the host. The data processing method includes the following steps. Firstly, plural block characteristic parameters of a specified block in a non-volatile memory of the open-channel solid state drive are collected. Then, the plural block characteristic parameters are inputted into a prediction function, so that a prediction value is acquired. If the prediction value exceeds a threshold value, a data in the specified block of the non-volatile memory is moved to a blank block of the non-volatile memory by the host.
    Type: Application
    Filed: July 18, 2019
    Publication date: December 10, 2020
    Inventors: Shih-Hung HSIEH, Yu-Cheng KAO, Sung-Hung Wu, I-Hsiang CHIU
  • Patent number: 10642328
    Abstract: A solid state drive with a reset circuit includes a controlling circuit, a flash array and a buffer. The controlling circuit includes a physical layer circuit and a first input/output port. The first input/output port is connected with a first reset terminal of a host. The flash array and the buffer are connected with the controlling circuit. When the first reset terminal of the host activates a reset signal, a voltage level of the first input/output port is changed. After a delay time, the voltage level of a second reset terminal of the physical layer circuit is changed and the physical layer circuit is reset.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: May 5, 2020
    Assignee: SOLID STATE STORAGE TECHNOLOGY CORPORATION
    Inventors: I-Hsiang Chiu, Shih-Hung Hsieh
  • Publication number: 20190113957
    Abstract: A solid state drive with a reset circuit includes a controlling circuit, a flash array and a buffer. The controlling circuit includes a physical layer circuit and a first input/output port. The first input/output port is connected with a first reset terminal of a host. The flash array and the buffer are connected with the controlling circuit. When the first reset terminal of the host activates a reset signal, a voltage level of the first input/output port is changed. After a delay time, the voltage level of a second reset terminal of the physical layer circuit is changed and the physical layer circuit is reset.
    Type: Application
    Filed: December 5, 2017
    Publication date: April 18, 2019
    Inventors: I-Hsiang Chiu, Shih-Hung Hsieh
  • Patent number: 9042186
    Abstract: A data erasing method of a solid state drive is provided. The solid state drive includes a memory module. The memory module includes a block. A data to be erased is stored in the block. The data erasing method includes steps of performing a first erasing operation to erase the block, programming the block after the first erasing operation, and performing a second erasing operation to erase the block.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: May 26, 2015
    Assignee: LITE-ON TECHNOLOGY CORPORATION
    Inventor: Shih-Hung Hsieh
  • Publication number: 20140219019
    Abstract: A data erasing method of a solid state drive is provided. The solid state drive includes a memory module. The memory module includes a block. A data to be erased is stored in the block. The data erasing method includes steps of performing a first erasing operation to erase the block, programming the block after the first erasing operation, and performing a second erasing operation to erase the block.
    Type: Application
    Filed: June 18, 2013
    Publication date: August 7, 2014
    Inventor: Shih-Hung Hsieh
  • Patent number: 7990739
    Abstract: A resonant power converter is provided and includes a capacitor, an inductive device, a first transistor, a second transistor, and a control circuit. The capacitor and the inductive device develop a resonant tank. The first transistor and the second transistor are coupled to switch the resonant tank. The control circuit generates a first signal and a second signal to control the first transistor and the second transistor respectively. Frequencies of the first signal and the second signal are changed for regulating output of the resonant power converter. The control circuit is further coupled to detect an input voltage of the resonant power converter. A pulse width of the second signal is modulated in response to change of the input voltage.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: August 2, 2011
    Assignee: System General Corporation
    Inventors: Ta-Yung Yang, Ying-Chieh Su, Tien-Chi Lin, Shih-Hung Hsieh
  • Patent number: 7911813
    Abstract: A synchronous rectifying circuit of a resonant switching power converter is provided to improve the efficiency. The synchronous rectifying circuit includes a power transistor and a diode connected to a transformer and an output ground of the power converter for rectifying. A sense transistor is coupled to the power transistor for generating a mirror current correlated to a current of the power transistor. A controller generates a driving signal to control the power transistor in response to a switching-current signal. A current-sense device is coupled to the sense transistor for generating the switching-current signal in response to the mirror current. The controller enables the driving signal to turn on the power transistor once the diode is forwardly biased. The controller generates a reset signal to disable the driving signal and turn off the power transistor once the switching-current signal is lower than a threshold.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: March 22, 2011
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Chen-Hui Chan, Chou-Sheng Wang, Shih-Hung Hsieh
  • Publication number: 20100202162
    Abstract: A resonant power converter is provided and includes a capacitor, an inductive device, a first transistor, a second transistor, and a control circuit. The capacitor and the inductive device develop a resonant tank. The first transistor and the second transistor are coupled to switch the resonant tank. The control circuit generates a first signal and a second signal to control the first transistor and the second transistor respectively. Frequencies of the first signal and the second signal are changed for regulating output of the resonant power converter. The control circuit is further coupled to detect an input voltage of the resonant power converter. A pulse width of the second signal is modulated in response to change of the input voltage.
    Type: Application
    Filed: August 24, 2009
    Publication date: August 12, 2010
    Applicant: SYSTEM GENERAL CORPORATION
    Inventors: Ta-Yung Yang, Ying-Chieh Su, Tien-Chi Lin, Shih-Hung Hsieh
  • Publication number: 20100014324
    Abstract: A synchronous rectifying circuit of a resonant switching power converter is provided to improve the efficiency. The synchronous rectifying circuit includes a power transistor and a diode connected to a transformer and an output ground of the power converter for rectifying. A sense transistor is coupled to the power transistor for generating a mirror current correlated to a current of the power transistor. A controller generates a driving signal to control the power transistor in response to a switching-current signal. A current-sense device is coupled to the sense transistor for generating the switching-current signal in response to the mirror current. The controller enables the driving signal to turn on the power transistor once the diode is forwardly biased. The controller generates a reset signal to disable the driving signal and turn off the power transistor once the switching-current signal is lower than a threshold.
    Type: Application
    Filed: July 21, 2008
    Publication date: January 21, 2010
    Applicant: SYSTEM GENERAL CORP.
    Inventors: Ta-Yung Yang, Chen-Hui Chan, Chou-Sheng Wang, Shih-Hung Hsieh
  • Publication number: 20070247512
    Abstract: In a track control method for marking a label side of an optical disc, a data side of the optical disc is first oriented to an optical head. A light beam is then emitted and a sled carrying the optical head moves. A series of moving distances of the sled are calculated according to the light beam reflected by the optical disc, which are then recorded in a memory. The optical disc is then flipped to have the label side face the optical head, and the shift of the optical head is controlled to mark on tracks of the label side according to the series of moving distances recorded in the memory.
    Type: Application
    Filed: April 3, 2007
    Publication date: October 25, 2007
    Applicant: LITE-ON IT CORP.
    Inventors: Jen-Yu Hsu, Shih-Hung Hsieh, Yao-Nan Chen, Ying-Ta Lin, Yu-Ming Kang