Patents by Inventor SHIH-HUNG YANG

SHIH-HUNG YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250040666
    Abstract: A strap member is provided and includes a strap body and a plurality of hook portions. The strap member includes a first surface and a second surface. Each of the plurality of hook portions includes a hole structure and at least one hook structure. The hole structure penetrates through the strap body and includes a first opening formed on the first surface and a second opening formed on the second surface. The at least one hook structure is at least partially disposed inside the hole structure and connected to a hole wall of the hole structure. Besides, a related strap assembly is also provided.
    Type: Application
    Filed: October 4, 2023
    Publication date: February 6, 2025
    Applicant: Universal Trim Supply Co., Ltd.
    Inventors: Shih-Sheng Yang, Chih-Hung Chen
  • Patent number: 12218227
    Abstract: A semiconductor structure includes substrate, semiconductor layers, source/drain features, metal oxide layers, and a gate structure. The semiconductor layers extend in an X-direction and over the substrate. The semiconductor layers are spaced apart from each other in a Z-direction. The source/drain features are on opposite sides of the semiconductor layers in the X-direction. The metal oxide layers cover bottom surfaces of the semiconductor layers. The gate structure wraps around the semiconductor layers and the metal oxide layers. The metal oxide layers are in contact with the gate structure.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Hao Lin, Chia-Hung Chou, Chih-Hsuan Chen, Ping-En Cheng, Hsin-Wen Su, Chien-Chih Lin, Szu-Chi Yang
  • Publication number: 20250031434
    Abstract: A method includes bonding a first semiconductor die and a second semiconductor die to a substrate, where a gap is disposed between a first sidewall of the first semiconductor die and a second sidewall of the second semiconductor die, performing a plasma treatment to dope top surfaces and sidewalls of each of the first semiconductor die and the second semiconductor die with a first dopant, where a concentration of the first dopant in the first sidewall decreases in a vertical direction from a top surface of the first semiconductor die towards a bottom surface of the first semiconductor die, and a concentration of the first dopant in the second sidewall decreases in a vertical direction from a top surface of the second semiconductor die towards a bottom surface of the second semiconductor die, and filling the gap with a spin-on dielectric material.
    Type: Application
    Filed: July 17, 2023
    Publication date: January 23, 2025
    Inventors: Yu-Hung Lin, Jih-Churng Twu, Su-Chun Yang, Shih-Peng Tai, Yu-Hao Kuo
  • Patent number: 12206169
    Abstract: An antenna module includes two antenna units, two isolation members, and a grounding member. Each antenna unit consists of two feeding ends, two first radiators, and two second radiators. The isolating members are disposed between the first and second portions of each antenna unit. The grounding member is disposed beside the two antenna units and the two isolation members. A first slot is formed among each first radiator, the second radiator, and the grounding member. The two second radiators are connected to the third radiator. A third slot is formed between the second radiator and the second portion. The two antenna units are symmetric to the fourth slot in a mirrored manner, and the two first portions have widths gradually changing along an extending direction of the fourth position.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: January 21, 2025
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Cheng-Hsiung Wu, Chia-Hung Chen, Shih-Keng Huang, Hau Yuen Tan, Sheng-Chin Hsu, Tse-Hsuan Wang, Hao-Hsiang Yang
  • Publication number: 20240203785
    Abstract: A semiconductor device includes a conductive structure, a first dielectric layer, a second dielectric layer and a liner layer. The conductive structure is located on a substrate. The first dielectric layer covers the conductive structure and the substrate. The second dielectric layer is located on the first dielectric layer. An air gap is present in the first dielectric layer and the second dielectric layer, and is located above the conductive structure. The liner layer covers and surrounds a middle portion of the air gap.
    Type: Application
    Filed: March 7, 2023
    Publication date: June 20, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Ching-Pin Hsu, Shih Hung Yang, Chu Chun Chang, Kuo-Yuh Yang, Chia-Huei Lin
  • Patent number: 11855533
    Abstract: A power supply device communicable with a system and a method for supplying power to a system through a switch thereof are disclosed. The power supply device includes a switch, a microcontroller unit and a control circuit, and supplies power to the system through the switch. The microcontroller unit provides a first operating voltage to the switch through a first pin, and performs a firmware update procedure when the power supply device communicates with the system. The control circuit is coupled to the switch, and transmits a second operating voltage to the switch. When the microcontroller unit performs the firmware update procedure, the control circuit turns on the switch at least according to the second operating voltage, so that the power supply device does not stop supplying power to the system.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: December 26, 2023
    Assignee: ATEMITECH CORPORATION
    Inventor: Shih-Hung Yang
  • Publication number: 20230231475
    Abstract: A power supply device communicable with a system and a method for supplying power to a system through a switch thereof are disclosed. The power supply device includes a switch, a microcontroller unit and a control circuit, and supplies power to the system through the switch. The microcontroller unit provides a first operating voltage to the switch through a first pin, and performs a firmware update procedure when the power supply device communicates with the system. The control circuit is coupled to the switch, and transmits a second operating voltage to the switch. When the microcontroller unit performs the firmware update procedure, the control circuit turns on the switch at least according to the second operating voltage, so that the power supply device does not stop supplying power to the system.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 20, 2023
    Inventor: SHIH-HUNG YANG
  • Patent number: 10608457
    Abstract: A method of controlling charging includes: receiving an input voltage; receiving by a control unit a detected voltage related to the input voltage; outputting a conducting voltage from the control unit when the detected voltage falls within an operation range; outputting an operating voltage to a detection pin of a charging unit according to the conducting voltage; outputting a charging current from the charging unit according to the input voltage when the detection pin receives the operating voltage; and not outputting the conducting voltage from the control unit when the detected voltage falls outside the operation range.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: March 31, 2020
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventor: Shih-Hung Yang
  • Publication number: 20200006951
    Abstract: A method of controlling charging includes: receiving an input voltage; receiving by a control unit a detected voltage related to the input voltage; outputting a conducting voltage from the control unit when the detected voltage falls within an operation range; outputting an operating voltage to a detection pin of a charging unit according to the conducting voltage; outputting a charging current from the charging unit according to the input voltage when the detection pin receives the operating voltage; and not outputting the conducting voltage from the control unit when the detected voltage falls outside the operation range.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Inventor: Shih-Hung YANG
  • Publication number: 20190363077
    Abstract: Embodiments of the present invention provide an electrostatic discharge protection circuit connected in series between a protection target and an external circuit. The electrostatic discharge protection circuit includes an N-type field-effect transistor and a diode. The N-type field-effect transistor has a drain coupled to an input pin of the protection target, a source coupled to a ground voltage, and a gate coupled to the external circuit. The diode has an anode coupled to the ground voltage, and a cathode together with the gate of the N-type field-effect transistor coupled to the external circuit.
    Type: Application
    Filed: September 27, 2018
    Publication date: November 28, 2019
    Inventor: SHIH-HUNG YANG