Patents by Inventor Shih-Jen Chen

Shih-Jen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154642
    Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.
    Type: Application
    Filed: January 16, 2024
    Publication date: May 9, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Wen LU, Chun-Jen CHEN, Po-Hsiang TSENG, Hsin-Han LIN, Ming-Lun YU
  • Publication number: 20240146205
    Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.
    Type: Application
    Filed: September 23, 2023
    Publication date: May 2, 2024
    Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
  • Publication number: 20240136383
    Abstract: A semiconductor device includes a single-layered dielectric layer, a conductive line, a conductive via and a conductive pad. The conductive line and the conductive via are disposed in the single-layered dielectric layer. The conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
  • Publication number: 20240096630
    Abstract: Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion of the gate stack and the first metal cap layer while leaving a sidewall portion of the first metal cap layer that extends along a sidewall of the first dielectric cap layer; forming a second metal cap layer over the gate stack and the first metal cap layer wherein a sidewall portion of the second metal cap layer extends further along a sidewall of the first dielectric cap layer; forming a second dielectric cap layer over the second metal cap layer; and flattening a top layer of the first dielectric cap layer and the second dielectric cap layer using planarization operations.
    Type: Application
    Filed: January 12, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Yu-Shih Wang, Jih-Sheng Yang, Shih-Chieh Chao, Yih-Ann Lin, Ryan Chia-Jen Chen
  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Publication number: 20240097403
    Abstract: A laser device is provided. The laser device includes a stack of epitaxial layers, a first conductive layer, an intermediate layer, and a first electrode. The stack of epitaxial layers has a central region and an edge region. The stack of epitaxial layers includes a first reflective structure, an active region disposed on the first reflective structure, a second reflective structure disposed on the active region. The first conductive layer disposes on the stack of epitaxial layers and covers the central region and at least a part of the edge region. The intermediate layer has a first opening that corresponding to the central region of the stack of epitaxial layers, wherein the intermediate layer comprises insulating material or metal. The first electrode disposes on the first conductive layer.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 21, 2024
    Inventors: Jung-Jen Li, Ching-En Huang, Hao-Ming Ku, Shih-I Chen
  • Publication number: 20240072170
    Abstract: A semiconductor device is disclosed. The semiconductor device includes a semiconductor fin. The semiconductor device includes first spacers over the semiconductor fin. The semiconductor device includes a metal gate structure, over the semiconductor fin, that is sandwiched at least by the first spacers. The semiconductor device includes a gate electrode contacting the metal gate structure. An interface between the metal gate structure and the gate electrode has its side portions extending toward the semiconductor fin with a first distance and a central portion extending toward the semiconductor fin with a second distance, the first distance being substantially less than the second distance.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Yu-Shih Wang, Yih-Ann Lin, Chia Ming Liang, Ryan Chia-Jen CHEN
  • Publication number: 20230077125
    Abstract: The present disclosure pertains to a method for diagnosing AMD comprising receiving OCTA image of a subject, pre-processing the OCTA image to obtain image data, inputting the image data to a trained deep learning (DL) network, generating using the trained DL network an output that characterizes the health of the subject with respect to AMD, and generating a diagnostic result based on the output.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 9, 2023
    Applicant: Taipei Veterans General Hospital
    Inventors: Shih-Hwa CHIOU, Shih-Jen CHEN, De-Kuang HWANG, Kao-Jung CHANG, Yi-Ping YANG, Yueh CHIEN
  • Patent number: 9830252
    Abstract: A software test method used in a software test system that includes a memory that stores a plurality of computer executable instructions and a processing unit coupled to the memory is provided. The software test method includes the steps outlined below. The processing unit detects input and output parameters of under-test software. The processing unit detects inner operation parameters of the under-test software. The processing unit establishes parameter variance probability of each parameter variances between any two functions included in the under-test software to generate test case including test parameters accordingly. The processing unit transmits test parameters of the test case to the under-test software to perform test.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: November 28, 2017
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Chien-Ting Kuo, Shih-Jen Chen
  • Publication number: 20170139811
    Abstract: A software test method used in a software test system that includes a memory that stores a plurality of computer executable instructions and a processing unit coupled to the memory is provided. The software test method includes the steps outlined below. The processing unit detects input and output parameters of under-test software. The processing unit detects inner operation parameters of the under-test software. The processing unit establishes parameter variance probability of each parameter variances between any two functions included in the under-test software to generate test case including test parameters accordingly. The processing unit transmits test parameters of the test case to the under-test software to perform test.
    Type: Application
    Filed: February 18, 2016
    Publication date: May 18, 2017
    Inventors: Chien-Ting KUO, Shih-Jen CHEN
  • Publication number: 20160132420
    Abstract: A pre-testing method adapted for environment updating is illustrated. The pre-testing method comprises following steps: while detecting an environment updating process should be performed to an operating system environment, determining whether an environment test should be executed; while the environment test is executed, selecting a plurality of pieces of system and software information of the operating system environment, wherein the system and software information of the operating system environment is extracted from the operating system environment; generating a virtual machine having a first clone environment according to the system and software information; performing the environment updating process to the first clone environment so as to cause the first clone environment to become a second clone environment of the virtual machine; and executing the environment test for the second clone environment.
    Type: Application
    Filed: November 10, 2014
    Publication date: May 12, 2016
    Inventors: CHIEN-TING KUO, SHIH-JEN CHEN
  • Patent number: 9146839
    Abstract: A method for pre-testing software compatibility is illustrated. A system and software information of an operating system is extracted. While that a patch or new software will be installed in the operating system is detected, whether a compatibility test should be executed is determined. While that the compatibility test should be executed is detected, a virtual machine with a first clone system is generated, wherein the first clone system is generated according to the system and software information. The patch or the new software is installed in the first clone system to generate a second clone system. The compatibility test for the second clone system is executed. According to a result of the compatibility test, whether the patch or new software can be installed in the operating system or the second clone system can be switched to be used is determined.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: September 29, 2015
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Shih-Jen Chen, Chien-Ting Kuo
  • Publication number: 20150089479
    Abstract: A method for pre-testing software compatibility is illustrated. A system and software information of an operating system is extracted. While that a patch or new software will be installed in the operating system is detected, whether a compatibility test should be executed is determined. While that the compatibility test should be executed is detected, a virtual machine with a first clone system is generated, wherein the first clone system is generated according to the system and software information. The patch or the new software is installed in the first clone system to generate a second clone system. The compatibility test for the second clone system is executed. According to a result of the compatibility test, whether the patch or new software can be installed in the operating system or the second clone system can be switched to be used is determined.
    Type: Application
    Filed: November 13, 2013
    Publication date: March 26, 2015
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: SHIH-JEN CHEN, CHIEN-TING KUO
  • Patent number: 8832838
    Abstract: A computer worm curing system includes a string receiving module, a string generating module and a string replying module. The string receiving module receives an infected string, which is generated by a computer worm, from an infected host, which is infected by the computer worm, through a network. The infected string includes a shellcode, and the shellcode is executed utilizing a vulnerable process. The string generating module generates a curing code for curing the computer worm, and replaces the shellcode in the infected string with the curing code to generate a curing string, such that the curing string can be executed utilizing the vulnerable process. The string replying module replies the curing string to the infected host, such that the curing code of the curing string can be executed utilizing the vulnerable process of the infected host to cure the infected host of the computer worm.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: September 9, 2014
    Assignee: Institute for Information Industry
    Inventors: Shih-Jen Chen, Jain-Shing Wu, Fu-Hau Hsu, Chia-Jun Lin
  • Patent number: 8776220
    Abstract: A phishing detecting method includes: a web-page accessing request for accessing a target web page at a target address is received; the target web page from the target address is obtained; the target web page is snapshotted to obtain a present page snapshot; the present page snapshot is compared with several pre-stored page snapshots stored in a database, wherein each of the pre-stored page snapshots corresponds to a pre-stored address; if the present page snapshot matches one of the pre-stored page snapshots, the target address is compared with the pre-stored address, corresponding pre-stored page snapshot of which matches the present page snapshot; if the target address does not match the pre-stored address, the corresponding pre-stored page snapshot of which matches the present page snapshot, it is determined that the target web page is a phishing web page.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: July 8, 2014
    Assignee: Institute for Information Industry
    Inventors: Shih-Jen Chen, Chien-Ting Kuo
  • Patent number: 8516581
    Abstract: A phishing processing method includes: an information input web page comprising an information input interface, through which information is transmitted to an information receiving address, is received. Determine if the information input web page is a phishing web page. If it is determined that the information input web page is the phishing web page, fake input information is transmitted to the information receiving address. When information for verification is received from an information transmitting address, if the received information for verification is the fake input information is determined. If the received information for verification is the fake input information, it is determined that the information transmitting address is a malicious address.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: August 20, 2013
    Assignee: Institute for Information Industry
    Inventors: Fu-Hau Hsu, Shih-Jen Chen, Chien-Ting Kuo, Jain-Shing Wu, Chuan-Sheng Wang
  • Publication number: 20130145462
    Abstract: A phishing processing method includes: an information input web page comprising an information input interface, through which information is transmitted to an information receiving address, is received. Determine if the information input web page is a phishing web page. If it is determined that the information input web page is the phishing web page, fake input information is transmitted to the information receiving address. When information for verification is received from an information transmitting address, if the received information for verification is the fake input information is determined. If the received information for verification is the fake input information, it is determined that the information transmitting address is a malicious address.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 6, 2013
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Fu-Hau Hsu, Shih-Jen Chen, Chien-Ting Kuo, Jain-Shing Wu, Chuan-Sheng Wang
  • Publication number: 20130097700
    Abstract: A phishing detecting method includes: a web-page accessing request for accessing a target web page at a target address is received; the target web page from the target address is obtained; the target web page is snapshotted to obtain a present page snapshot; the present page snapshot is compared with several pre-stored page snapshots stored in a database, wherein each of the pre-stored page snapshots corresponds to a pre-stored address; if the present page snapshot matches one of the pre-stored page snapshots, the target address is compared with the pre-stored address, corresponding pre-stored page snapshot of which matches the present page snapshot; if the target address does not match the pre-stored address, the corresponding pre-stored page snapshot of which matches the present page snapshot, it is determined that the target web page is a phishing web page.
    Type: Application
    Filed: December 8, 2011
    Publication date: April 18, 2013
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Shih-Jen Chen, Chien-Ting Kuo
  • Publication number: 20120117647
    Abstract: A computer worm curing system includes a string receiving module, a string generating module and a string replying module. The string receiving module receives an infected string, which is generated by a computer worm, from an infected host, which is infected by the computer worm, through a network. The infected string includes a shellcode, and the shellcode is executed utilizing a vulnerable process. The string generating module generates a curing code for curing the computer worm, and replaces the shellcode in the infected string with the curing code to generate a curing string, such that the curing string can be executed utilizing the vulnerable process. The string replying module replies the curing string to the infected host, such that the curing code of the curing string can be executed utilizing the vulnerable process of the infected host to cure the infected host of the computer worm.
    Type: Application
    Filed: December 7, 2010
    Publication date: May 10, 2012
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Shih-Jen Chen, Jain-Shing Wu, Fu-Hau Hsu, Chia-Jun Lin
  • Publication number: 20060278160
    Abstract: A photoresist coating apparatus comprises a photoresist coating device, a cleaning device and a stage. A substrate is placed on the stage. In a photoresist coating process, the cleaning device removes particles on the substrate first. The photoresist coating device then sprays a photoresist material uniformly on a surface of the substrate.
    Type: Application
    Filed: May 9, 2006
    Publication date: December 14, 2006
    Applicant: QUANTA DISPLAY INC.
    Inventors: Yu-Huang Su, Shih-Jen Chen, Chen-Nan Chou