Abstract: An electronic device including a first portion, a second portion, and a circuit board is provided. The first portion has a first surface including a first conductive region. The second portion has a second surface including a second conductive region and a second nonconductive region. The second conductive region and the second nonconductive region are respectively in contact with a part of the first conductive region. The circuit board has a plurality of electronic components thereon, and the circuit board is disposed at one side of the first portion and the second portion.

Abstract: A light emitting diode package is disclosed. It includes a chip, a slug, a PCB, a lens and a reflector. The chip is mounted on the slug. The slug transmits the heat of the chip out of the light emitting diode package. The PCB connects the chip with circuits or wires. The lens transmits the emitting light of the chip out of the light emitting diode package. The reflector reflects the emitting light of the chip, and combines the slug, the PCB and the lens together.

Abstract: A data accessing method executed by a processing unit, the method comprising the steps of: (a) decoding an instruction; (b) checking whether the instruction has to be repeated M times to read data with successive addresses in a main memory, wherein the number M is stored in a count register of the processing unit; (c) if the step (b) is true, getting a data from a cache, a pre-fetch buffer, or the main memory, and then decreasing M by one; (d) if M is zero, terminating the data accessing method; (e) determining and pre-fetching data by comparing M to the number of unread data stored in the cache and the pre-fetch buffer; and (f) getting the next data from the cache or the pre-fetch buffer, decreasing M by one, and then returning to step (d).

Abstract: A method of manufacturing photo couplers is provided. At first, a receiver lead-frame array is cut from a lead-frame matrix having a transmitter lead-frame array and the receiver lead-frame array. Then, the receiver lead-frame array is overturned and placed on the lead-frame matrix to allow light-receiver elements on the receiver lead-frame array to face light-emitting elements on the transmitter lead-frame array of the lead-frame matrix. Finally, the receiver lead-frame array and the lead-frame matrix are connected.

Abstract: A structure of a lead-frame matrix of photoelectron devices is provided. The lead-frame matrix is used to fabricate a first lead-frame array and a second lead-frame array. In the structure of the lead-frame matrix of the photoelectron devices, pins of the first lead-frame array and pins of the second lead-frame array are alternatively inserted.

Abstract: A light emitting diode (LED) packaging structure includes a package body, a lead frame and a reflective wall. The package body includes a chip accommodating space for an LED chip, and a portion of the lead frame is exposed to the chip accommodating space. The reflective wall is connected with the lead frame and extendedly bends from the lead frame to cover a sidewall of the accommodating space so that rays of the LED chip can reflect from the reflective wall mostly.

Abstract: A tristate operating mode setting device is proposed, which is designed for use with an electronic circuit unit for providing the electronic circuit unit with a tristate operating mode setting function, and which is characterized by the utilization of a specially-designed logic circuit and logic control signal generator to allow the electronic circuit unit to be selectively set to one of three different operating modes during startup through a connecting pad that can be externally connected in three different ways. This feature allows one single pad for the provision of three different operating mode settings, whereas prior art is only capable of providing two different settings. The electronic circuit unit is therefore able to use fewer number of pads to provide an increased number of operating mode settings, with the benefit of reducing layout space on circuit board.

Abstract: A conversion interface of memory device is provided for converting a current operating command of a user's software program to an operating command capable of being executed by the memory device. The conversion interface includes a command decoding module and a command generating module. The command decoding module receives the operating command of the user's software program and decodes the operating command to a decoding command, such that the command generating module generates the operating command capable of being executed by the memory device according to the decoding command. This can realize compatibility between a current software program and a new type of memory device, thereby effectively reducing the design costs and product development cycle and providing great flexibility in design.

Abstract: A tristate operating mode setting device is proposed, which is designed for use with an electronic circuit unit for providing the electronic circuit unit with a tristate operating mode setting function, and which is characterized by the utilization of a specially-designed logic circuit and logic control signal generator to allow the electronic circuit unit to be selectively set to one of three different operating modes during startup through a connecting pad that can be externally connected in three different ways. This feature allows one single pad for the provision of three different operating mode settings, whereas prior art is only capable of providing two different settings. The electronic circuit unit is therefore able to use fewer number of pads to provide an increased number of operating mode settings, with the benefit of reducing layout space on circuit board.

Abstract: A function selection system is applicable in an integrated circuit having at least one functional signal line for controlling potential of the functional signal line to select a functionality provided by the integrated circuit. The function selection system at least has a power supply module, a switching module, and a connection module. The power supply module is used to provide power required for operation of the system. The switching module is electrically connected to the power supply module and the functional signal line of the integrated circuit for controlling the magnitude of the current provided by the power supply module flowing through the switching module to be outputted. The connection module is electrically connected to the switching module, the functional signal line of the integrated circuit and a ground terminal, and is used to determine a connection relationship with the ground terminal according to the outputted current magnitude from the switching module.

Abstract: A data accessing method and a system for use with the same are provided. A processing unit reads a command from a memory unit and decodes the command. Then, the processing unit determines if the command requires pre-fetching of data that are not stored in a cache or a buffer unit; if yes, the processing unit sends a fetching request to the memory unit according to addresses of data to be fetched and pre-fetched. Moreover, the processing unit reads the data to be fetched from the memory unit and stores the data to be pre-fetched in the buffer unit. Thereby, the above method and system can achieve data pre-fetching accurately.

Abstract: A method and a system for accessing memory data are provided. When an interface unit receives a memory accessing request from a processing unit, a non-cacheable memory buffer unit determines if a memory address corresponds to that in the memory accessing request; if yes, retrieving the memory address; if no, forwarding the memory accessing request to an arbitration unit for accessing data in a memory unit. During transmission of data from the memory unit to the interface unit, the non-cacheable memory buffer unit retrieves the data to simultaneously update stored data. The non-cacheable memory buffer unit pre-reads memory address data following the retrieved data to enhance a data reading speed for the processing unit. During writing data into the memory unit, the non-cacheable memory buffer unit updates the stored data by the written data if a memory address of the written data is identical to that of the stored data.

Abstract: An algorithm for conditionally pre-fetching data for DRAM access is disclosed. A similar pattern of performing successive block reads of DRAM data in the execution of several types of instructions in a computer system is determined by analyzing CPU signals. These instructions repeatedly read blocks of data from a local memory area. Additional writes to memory or an input/output port may intervene between the repeated block reads. By using the pattern as a condition for pre-fetching data from DRAM into a high speed memory buffer of a memory controller, consecutive memory reads can be completed with zero wait state. The penalty incurred by unconditional pre-fetching of DRAM data is minimized. The conditional pre-fetching mechanism is applicable to other computer peripheral devices.