Patents by Inventor Shih-Jye Cheng

Shih-Jye Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150171039
    Abstract: A semiconductor structure includes a device, a conductive pad over the device and a Ag1-xYx alloy pillar disposed on the conductive pad, wherein the Y of the Ag1-xYx alloy comprises metals forming complete solid solution with Ag at arbitrary weight percentage, and wherein the X of the Ag1-xYx alloy is in a range of from about 0.005 to about 0.25.
    Type: Application
    Filed: December 13, 2013
    Publication date: June 18, 2015
    Applicant: CHIPMOS TECHNOLOGIES INC.
    Inventors: SHIH JYE CHENG, TUNG BAO LU
  • Patent number: 8877630
    Abstract: The present disclosure provides a method for manufacturing a semiconductor structure. The method includes forming a conductive pad on a semiconductor die; forming a seed layer over the conductive pad; defining a first mask layer over the seed layer; and forming a silver alloy bump body in the first mask layer. The forming a silver alloy bump body in the first mask layer includes operations of preparing a first cyanide-based bath; controlling a pH value of the first cyanide-based bath to be within a range of from about 6 to about 8; immersing the semiconductor die into the first cyanide-based bath; and applying an electroplating current density of from about 0.1 ASD to about 0.5 ASD to the semiconductor die.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: November 4, 2014
    Assignee: ChipMos Technologies Inc.
    Inventors: Shih Jye Cheng, Tung Bao Lu
  • Patent number: 8779604
    Abstract: A semiconductor structure includes a device, a conductive pad on the device, and a Ag1-xYx alloy bump over the conductive pad. The Y of the Ag1-xYx bump comprises metals forming complete solid solution with Ag at arbitrary weight percentage, and the X of the Ag1-xYx alloy bump is in a range of from about 0.005 to about 0.25. A difference between one standard deviation and a mean value of a grain size distribution of the Ag1-xYx alloy bump is in a range of from about 0.2 ?m to about 0.4 ?m. An average grain size of the Ag1-xYx alloy bump on a longitudinal cross sectional plane is in a range of from about 0.5 ?m to about 1.5 ?m.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: July 15, 2014
    Assignee: Chipmos Technologies Inc.
    Inventors: Shih Jye Cheng, Tung Bao Lu
  • Patent number: 7140101
    Abstract: A method for fabricating an anisotropic conductive substrate is disclosed. A back holder has metal pins on a surface thereof. A liquid compound is formed on the surface of the back holder with metal pins. The liquid compound is pressed to deform the metal pins into electrodes in the liquid compound. The thickness between upper surface and lower surface of the liquid compound is between 25 ?m and 250 ?m. The electrodes have upper ends and lower ends exposed from upper surface and lower surface of the liquid compound to provide electrical contact of anisotropic conduction.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: November 28, 2006
    Assignees: ChipMOS Technologies (Bermuda) Ltd., ChipMOS Technologies Inc.
    Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Yao-Jung Lee
  • Patent number: 6946860
    Abstract: A modularized probe head for modularly assembling on a probe card is configured for probing a semiconductor wafer under test. The probe head includes a silicon substrate having an active surface and an opposing back surface. The back surface of the silicon substrate is attached on a holder. The silicon substrate has a plurality of peripheral bond pads and contact pads on its active surface. At least a probing chip is mounted on the active surface of the silicon substrate. The probing chip has probing tips and side electrodes. The side electrodes are connected with the contact pads by means of solder material. The peripheral bonding pads of the silicon substrate are connected with a flexible printed circuit for electrically connecting to a multi-layer printed circuit board of a probe card.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: September 20, 2005
    Assignees: ChipMOS Technologies (Bermuda) Ltd., ChipMOS Technologies Inc.
    Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yeong-Ching Chao, Yao-Jung Lee
  • Patent number: 6853205
    Abstract: A probe card assembly is disclosed. The probe card assembly comprises a stiffener ring combining respectively with an upper printed circuit board and a lower printed circuit board. A plurality of coaxial transmitters are installed in the stiffener ring, and connect to the upper and lower printed circuit boards by cable connectors. The lower printed circuit board is assembled with a detachable probe head which comprises a silicon substrate with probing points and a probe head carrier. A downset is formed at the center of the probe head carrier. The standardized coaxial transmitters, printed circuit boards and probe heads are then assembled as a probe card assembly for testing all sorts of IC products.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: February 8, 2005
    Assignees: Chipmos Technologies (Bermuda) Ltd., Chipmos Technologies Inc.
    Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Yao-Jung Lee
  • Publication number: 20050012513
    Abstract: A probe card assembly is disclosed. The probe card assembly comprises a stiffener ring combining respectively with an upper printed circuit board and a lower printed circuit board. A plurality of coaxial transmitters are installed in the stiffener ring, and connect to the upper and lower printed circuit boards by cable connectors. The lower printed circuit board is assembled with a detachable probe head which comprises a silicon substrate with probing points and a probe head carrier. A downset is formed at the center of the probe head carrier. The standardized coaxial transmitters, printed circuit boards and probe heads are then assembled as a probe card assembly for testing all sorts of IC products.
    Type: Application
    Filed: July 17, 2003
    Publication date: January 20, 2005
    Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Yao-Jung Lee
  • Patent number: 6812720
    Abstract: A modularized probe card with coaxial transmitter is disclosed. At least a coaxial transmitter is modularized and installed between a first printed circuit board and a second printed circuit board. The coaxial transmitter has a first connector and a second connector correspondingly connecting two ends of each coaxial cable of the coaxial transmitter for electrically connecting corresponding in location to first printed circuit board and second printed circuit board. A probe head is bonded on second printed circuit board. The second connector of the coaxial transmitter is connected with the second printed circuit board in a plug-in and pull-away type.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: November 2, 2004
    Assignees: Chipmos Technologies (Bermuda) Ltd., Chipmos Technologies Inc.
    Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Yao-Jung Lee
  • Patent number: 6781392
    Abstract: A modularized probe card comprising an interface board, a probe head and at least a compressible electrical connection device is disclosed. The compressible electrical connection device comprises an insulation layer with a plurality of circuits on one of its surface. Two ends of each circuit connect respectively to the first contacting pad and the second contacting pad which combine with elastic contact members. Each elastic contact member has a supporter combining with a conductive layer for electrical connections by pushing and compressing. While a probe head is modularized installed on an interface board, the elastic contact members of the compressible electrical connection device is elastically contacted and compressed the probe head and the interface board to acquire modularized electrical connection of the probe card.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: August 24, 2004
    Assignees: Chipmos Technologies Ltd., Chipmos Technologies Inc.
    Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Yao-Jung Lee
  • Patent number: 6621710
    Abstract: A modular probe card assembly comprises a silicon substrate with probes modularly assembled on a main board. At least a socket is installed around silicon substrate and electrically connects to probe needles by a flexible printed wiring film. A plurality of detachable coaxial wires electrically connect sockets with the main board for achieving variability of connecting paths during manufacturing. Thus, the probe card assembly has the effect of adjustable amendment and is suitable for high speed testing.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: September 16, 2003
    Assignees: ChipMOS Technologies (Bermuda) Ltd., ChipMOS Technologies Inc.
    Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Yao-Jung Lee