Patents by Inventor Shih KANG

Shih KANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11971219
    Abstract: A heat dissipation device includes at least a temperature plate and a cooling fin assembly. The temperature plate includes a plate body and a supporter. The plate body includes a vacuum chamber and a first external surface. The plate body is bent to form at least a bent portion with the first external surface being a compressive side, and the supporter is disposed at the bent portion. The supporter is disposed inside the vacuum chamber and connected to an inner wall of the vacuum chamber. The cooling fin assembly is disposed on the first external surface.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: April 30, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Kuang Tan, Shih-Kang Lin
  • Publication number: 20240088050
    Abstract: A semiconductor device includes a die, an encapsulant over a front-side surface of the die, a redistribution structure on the encapsulant, a thermal module coupled to the back-side surface of the die, and a bolt extending through the redistribution structure and the thermal module. The die includes a chamfered corner. The bolt is adjacent to the chamfered corner.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Chen-Hua Yu, Wei-Kang Hsieh, Shih-Wei Chen, Tin-Hao Kuo, Hao-Yi Tsai
  • Publication number: 20240006233
    Abstract: A semiconductor device includes a substrate, an interconnect layer disposed over the substrate, a metal line formed in the interconnect layer, a dielectric layer disposed on the interconnect layer, and a via contact formed in the dielectric layer and electrically connected to the metal line. One of the via contact and the metal line includes a first metal material and a barrier metal layer disposed on the first metal material. The first metal material includes an alloy which is a mixture of two metal elements. The barrier metal layer includes one of the two metal elements.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Kang FU, Hsien-Chang WU, Ming-Han LEE, Shau-Lin SHUE
  • Publication number: 20230386910
    Abstract: A semiconductor structure includes a contact over a substrate, an interlayer dielectric (ILD) layer including a first region disposed directly above the contact and a second region disposed adjacent to the first region, first conductive features embedded in the first region and separated by a first distance, a dielectric layer embedded in the ILD layer and disposed between the first conductive features in the first region, and second conductive features disposed in the second region and separated by a second distance greater than the first distance. The second region is free of the dielectric layer.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 30, 2023
    Inventors: Shih-Kang Fu, Ming-Han Lee, Shau-Lin Shue
  • Patent number: 11810816
    Abstract: A semiconductor structure is provided. The semiconductor structure include a substrate and a first dielectric layer having at least one via over the substrate. The first dielectric layer includes a first portion having a first thickness and a second portion having a second thickness greater than the first thickness. The semiconductor structure further includes a second dielectric layer containing at least one first conductive line overlying the first portion of the first dielectric layer and at least one second conductive line overlying the second portion of the first dielectric layer. The at least one first conductive line includes a first conductive portion and a conductive cap, and the at least one second conductive line including a second conductive portion having a top surface coplanar with a top surface of the conductive cap.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: November 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Kang Fu, Ming-Han Lee
  • Patent number: 11803110
    Abstract: A projection device configured to provide multiple projection modes is provided. The projection device includes a housing module and a projection module. The housing module includes a display screen and multiple protective walls. The display screen includes a display curved surface. The projection module includes an optomechanical assembly and a light guide assembly. In a first projection mode, the optomechanical assembly projects an image light beam to the light guide assembly along a first axis. The light guide assembly projects the image light beam to the display curved surface along a second axis, where the first axis and the second axis are not parallel to each other. In a second projection mode, the light guide assembly is moved out of a transmission path of the image light beam, so that the image light beam is directly projected out of the projection device.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: October 31, 2023
    Assignees: Coretronic Corporation, Coretronic Reality Incorporation
    Inventors: Chun-Hsien Wu, Kun-Chen Hsu, Shih Kang Lin, Jung-Ya Hsieh
  • Patent number: 11742239
    Abstract: A method of forming a semiconductor structure includes removing a top portion of a conductive feature disposed in a first dielectric layer and over a semiconductor substrate to form a first recess, depositing a second dielectric layer over the first dielectric layer, where the second dielectric layer includes a first region disposed vertically above the first recess and a second region disposed adjacent the first region, and forming a third dielectric layer over the second dielectric layer. The method further includes subsequently forming openings in the third dielectric layer that extend to expose the second dielectric layer, depositing a conductive material in the openings, and planarizing the conductive material to form conductive features in the first and the second regions, where the planarizing completely removes portions of the third dielectric layer disposed in the second region.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: August 29, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Kang Fu, Ming-Han Lee, Shau-Lin Shue
  • Publication number: 20230178475
    Abstract: A chip package and a method of fabricating the same are disclosed. The chip package includes a substrate with a first region, a second region surrounding the first region, and a third lane region surrounding the second region, a device layer disposed on the substrate, a via layer disposed on the device layer, an interconnect structure disposed on the via layer, and a stress buffer layer with tapered side profiles disposed on the interconnect structure. First and second portions of the via layer above the first and second regions include first and second set of vias. First, second, and third portions of the interconnect structure above the first, second, and third regions include conductive lines connected to the devices, a first set of dummy metal lines connected to the second set of vias, and a second set of dummy metal lines.
    Type: Application
    Filed: June 3, 2022
    Publication date: June 8, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jun HE, Li-Hsien Huang, Yao-Chun Chuang, Chih-Lin Wang, Shih-Kang Tien
  • Patent number: 11639145
    Abstract: A vehicle structure material strengthening system and a vehicle containing the same are described. The vehicle structure material strengthening system has at least one collision sensor, a processor, and a power supply. The collision sensor is suitable for being mounted on the vehicle. The processor is electrically connected to the collision sensor for receiving a collision signal from the collision sensor, and determines whether to transmit a power activation signal according to the collision signal. The power supply is electrically connected to the processor and the vehicle. When the collision signal is greater than or equal to a collision threshold, the processor transmits the power activation signal to the power supply, wherein the power supply transmits a circuit to the vehicle according to the power activation signal; or when the collision signal is less than the collision threshold, the processor does not transmit the power activation signal.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: May 2, 2023
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Shih-Kang Lin, Yu-Chen Liu, Yu-Ching Chen, Kuan-Hsueh Lin
  • Publication number: 20230118565
    Abstract: The present disclosure provides a method that includes depositing a metal layer onto a substrate, subtractive patterning the metal layer into first metal lines, and forming at least one second metal line between two adjacent ones of the first metal lines using a damascene process. The first metal lines have a different metallization structure from the at least one second metal line.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 20, 2023
    Inventors: Shih-Kang Fu, Ming-Han Lee, Shau-Lin Shue
  • Publication number: 20230112479
    Abstract: The present invention provides a photodiode, which includes: a light absorption substrate, a first electrode portion, a second electrode portion, an antireflection layer, and a distributed Bragg reflection layer. The antireflection layer is arranged to receive light to get into the light absorption substrate. The antireflection layer is arranged to receive light to get into the light absorption substrate, and the distributed Bragg reflection layer is arranged to reflect light transmitting through the light absorption substrate to exit from the light absorption substrate back to the light absorption substrate, in order to enhance the photocurrent and the spectrum sensitivity of the photodiode.
    Type: Application
    Filed: October 12, 2021
    Publication date: April 13, 2023
    Inventors: SHIH-KANG CHEN, CHIH-YANG CHANG, CHENG-YI HSU
  • Publication number: 20230059922
    Abstract: A hot-swappable pump unit (HSPU) and a coolant distribution unit (CDU) using the same are disclosed. The HSPU is connected to a loop inlet element, a loop outlet element and a fixed component of CDU along a matching direction. The HSPU includes a housing, a pump, a pump inlet element, a pump outlet element and a fastening component. The pump inlet element is in communication with the pump by passing through a first lateral wall of the housing. The pump outlet element is in communication with the pump by passing through the first lateral wall. The fastening component is arranged on the housing and configured to engage with the fixed component, to drive the hosing to move along the matching direction. Whereby, the pump inlet element and the loop outlet element are matched and connected, and the pump outlet element and the loop inlet element are matched and connected.
    Type: Application
    Filed: August 15, 2022
    Publication date: February 23, 2023
    Inventors: Shih-Kang Lin, Li-Kuang Tan
  • Publication number: 20230024957
    Abstract: A system of issuing a wireless key for reservation has a reservation website providing a reservation voucher to the user immediately when the booking is completed, and a hotel server receiving and verifying the reservation voucher through an access point set in the hotel when the user enters a sensing range of the access point, and issuing an electronic key and a detecting software after the reservation voucher is verified. Then one of the electronic locks of the rooms can be unlock and upgrade by detecting the electronic key and the detecting software.
    Type: Application
    Filed: October 4, 2022
    Publication date: January 26, 2023
    Inventor: Shih-Kang Chou
  • Patent number: 11543188
    Abstract: A temperature plate device includes a plate body and a bent structure. The plate body includes a first plate and a second plate. A chamber is defined by the first plate and the second plate. The first plate has a first step section. The second plate has a second step section corresponding to the first step section. The bent structure is connected to and traverses the first step section between the first step section and the second step section.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: January 3, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Kuang Tan, Shih-Kang Lin, Kuo-Ying Lee, Ting-Yuan Wu, Chao-Wen Lu
  • Patent number: 11545389
    Abstract: A semiconductor device is provided. The semiconductor device includes a dielectric layer over a substrate and a contact structure embedded in the dielectric layer. The contact structure includes a diffusion barrier contacting the dielectric layer, the diffusion barrier including a titanium (Ti)-containing alloy. The contact structure further includes a liner on the diffusion barrier, the liner including a noble metal. The contact structure further includes a conductive plug on the liner.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: January 3, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Kang Fu, Ming-Han Lee, Shau-Lin Shue
  • Publication number: 20220367346
    Abstract: The present disclosure provides a semiconductor device that includes a substrate, a first dielectric layer over the substrate, and an interconnect layer over the first dielectric layer. The interconnect layer includes a plurality of metal lines and a second dielectric layer filling space between the plurality of metal lines. The plurality of metal lines includes a first metal line having a first bulk metal layer of a noble metal and a second metal line having a second bulk metal layer of a non-noble metal.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Inventors: Shih-Kang Fu, Ming-Han Lee, Shau-Lin Shue
  • Publication number: 20220367244
    Abstract: A semiconductor device is provided. The semiconductor device includes a dielectric layer over a substrate and a contact structure embedded in the dielectric layer. The contact structure includes a diffusion barrier contacting the dielectric layer, the diffusion barrier including a titanium (Ti)-containing alloy. The contact structure further includes a liner on the diffusion barrier, the liner including a noble metal. The contact structure further includes a conductive plug on the liner.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 17, 2022
    Inventors: Shih-Kang Fu, Ming-Han Lee, Shau-Lin Shue
  • Publication number: 20220334456
    Abstract: A projection device configured to provide multiple projection modes is provided. The projection device includes a housing module and a projection module. The housing module includes a display screen and multiple protective walls. The display screen includes a display curved surface. The projection module includes an optomechanical assembly and a light guide assembly. In a first projection mode, the optomechanical assembly projects an image light beam to the light guide assembly along a first axis. The light guide assembly projects the image light beam to the display curved surface along a second axis, where the first axis and the second axis are not parallel to each other. In a second projection mode, the light guide assembly is moved out of a transmission path of the image light beam, so that the image light beam is directly projected out of the projection device.
    Type: Application
    Filed: March 16, 2022
    Publication date: October 20, 2022
    Applicants: Coretronic Corporation, Coretronic Reality Incorporation
    Inventors: Chun-Hsien Wu, Kun-Chen Hsu, Shih Kang Lin, Jung-Ya Hsieh
  • Patent number: 11450602
    Abstract: The present disclosure provides a method for forming semiconductor structures. The method includes providing a device having a substrate, a first dielectric layer over the substrate, and a first conductive feature over the first dielectric layer, the first conductive feature comprising a first metal, the first metal being a noble metal. The method also includes depositing a second dielectric layer over the first dielectric layer and covering at least sidewalls of the first conductive feature; etching the second dielectric layer to form a trench; and forming a second conductive feature in the trench. The second conductive feature comprises a second metal different from the first metal.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: September 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Kang Fu, Ming-Han Lee, Shau-Lin Shue
  • Publication number: 20220270915
    Abstract: A semiconductor structure is provided. The semiconductor structure include a substrate and a first dielectric layer having at least one via over the substrate. The first dielectric layer includes a first portion having a first thickness and a second portion having a second thickness greater than the first thickness. The semiconductor structure further includes a second dielectric layer containing at least one first conductive line overlying the first portion of the first dielectric layer and at least one second conductive line overlying the second portion of the first dielectric layer. The at least one first conductive line includes a first conductive portion and a conductive cap, and the at least one second conductive line including a second conductive portion having a top surface coplanar with a top surface of the conductive cap.
    Type: Application
    Filed: May 13, 2022
    Publication date: August 25, 2022
    Inventors: Shih-Kang FU, Ming-Han LEE