Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: An integrated circuit is disclosed. The integrated circuit is coupled to a circuit board. The circuit board includes several signal pair channels. The integrated circuit includes several output terminals and a control circuit. The control circuit is configured to configure several output signals output to several signal pair channels by several output terminals, so that a first signal pair channel and a second signal pair channel of several signal pair channels receive and output several output signals, so that a third signal pair channel of several signal pair channels shields an interference between the first signal pair channel and the second signal pair channel. The third signal pair channel is adjacent to the first signal pair channel and the second signal pair channel, and the third signal pair channel is located between the first signal pair channel and the second signal pair channel.

Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.

Abstract: A photonic semiconductor device including a light-emitting component and a photonic integrated circuit is provided. The light-emitting component at least includes a gain medium layer, a first contact layer and a first optical coupling layer stacked to each other. The photonic integrated circuit includes a second optical coupling layer. The light-emitting component and the photonic integrated circuit are stacked in a stacking direction, the first optical coupling layer has a first taper portion, the second optical coupling layer has a second taper portion, and the first taper portion and the second taper portion overlap in the stacking direction. Accordingly, the light emitted from the gain medium layer may be transmitted to the second taper portion from the first taper portion by optical coupling in a short length of an optical coupling path.

Abstract: Optical devices and methods of manufacture are presented in which a laser die or other heterogeneous device is embedded within an optical device and evanescently coupled to other devices. The evanescent coupling can be performed either from the laser die to a waveguide, to an external cavity, to an external coupler, or to an interposer substrate.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A light-emitting device comprises a substrate; a first semiconductor layer formed on the substrate; a first patterned layer formed on the first semiconductor layer; and a second semiconductor layer formed on the first semiconductor layer, wherein the second semiconductor layer comprises a core layer comprising a group III or transition metal material formed along the first patterned layer.

Abstract: A light-emitting element includes a substrate includes an upper surface; a plurality of protrusions formed on the upper surface, wherein the plurality of protrusions includes a height less than or equal to 1 ?m; and a stack structure formed on the substrate, wherein the stack structure includes a first doped semiconductor layer, a light-emitting layer, and a second doped semiconductor layer, wherein the stack structure includes a total thickness less than 4 ?m.

Abstract: The present disclosure provides a colon-targeted active agent delivery carrier, including: a low methoxyl pectin derived from Jelly fig (Jelly fig LM pectin) and a divalent cation, wherein the Jelly fig LM pectin crosslinks with the divalent cation in an egg-box conformation, wherein the colon-targeted composition is degraded by at least one enzyme in the colon of the subject to release the active agent.

Abstract: A package comprises an interposer, comprising an interposer substrate including at least one layer, and a plurality of RDLs formed through at least a portion of the interposer substrate. The package also includes a die device structure comprising at least one device die, and a first test line (TL) structure interposed between the interposer and the die device structure. The first TL structure includes at least one first test line electrically coupled to the at least one device die, at least a portion of the at least one first test line extending beyond a peripheral edge of the die device structure to provide an electrical interface with the at least one device die.

Abstract: A movable paper guide structure of a label printer includes: a paper guide body installed in the label printer including a roller and a print head; a movable unit that is movably installed on the paper guide body close to one end of the print head, adapts to a displacement of the roller and the print head because of a changed contact position, and keeps approaching the print head during a print process of the label printer for neither gap between the tip of the movable unit and the print head nor other problems such as a label sticker on printing paper improperly peeled off, printing crooked and paper jam.

Abstract: A movable paper guide structure of a label printer includes: a paper guide body installed in the label printer including a roller and a print head; a movable unit that is movably installed on the paper guide body close to one end of the print head, adapts to a displacement of the roller and the print head because of a changed contact position, and keeps approaching the print head during a print process of the label printer for neither gap between the tip of the movable unit and the print head nor other problems such as a label sticker on printing paper improperly peeled off, printing crooked and paper jam.

Abstract: The present disclosure provides a method for fabricating a semiconductor structure, including placing a wafer on a chuck, wherein the wafer is surrounded by a focus ring, the focus ring is supported by a first actuator, wherein the first actuator is in a cavity defined by the chuck and the edge ring, wherein the first actuator includes an outer ring disposed in the cavity, a piezoelectric layer apart from a top surface of the cavity, wherein an edge of the piezoelectric layer is fixed by the outer ring, and an inner ring disposed in the chamber at a center portion of the piezoelectric layer, performing plasma etch on a surface of the wafer, and controlling a distance between a gas distribution plate and a top surface of the focus ring to be less than a threshold value by the first actuator.

Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.

Abstract: A package comprises an interposer, comprising an interposer substrate including at least one layer, and a plurality of RDLs formed through at least a portion of the interposer substrate. The package also includes a die device structure comprising at least one device die, and a first test line (TL) structure interposed between the interposer and the die device structure. The first TL structure includes at least one first test line electrically coupled to the at least one device die, at least a portion of the at least one first test line extending beyond a peripheral edge of the die device structure to provide an electrical interface with the at least one device die.

Abstract: The present disclosure provides an apparatus for fabricating a semiconductor structure, including a chuck, an edge ring surrounding the chuck, wherein the edge ring comprises a cavity, a focus ring adjacent to an edge of the chuck and over the edge ring, and a first actuator in the cavity of the edge ring and engaging with the focus ring.

Abstract: An apparatus includes a casing configured to be detachably mounted on a workpiece. The casing includes a first opening configured to expose a portion of the workpiece; a first support member coupled to the casing and constructed to move along a first axis through the casing and rotate around the first axis; a second support member coupled to the first support member and constructed to move along a second axis perpendicular to the first axis; an arm pivotally coupled to the second support member and constructed to rotate around a third axis perpendicular to the first axis and the second axis; and a cleaning head attached to the arm and constructed to rotate around a longitudinal axis of the arm. The casing includes a first plate and a second plate opposite to the first plate, wherein the cleaning head is configured to extend outside the casing through the first opening.

Abstract: The disclosure relates to a pulsating heat pipe including channel plate. The channel plate includes first surface, second surface, first channels, second channels, first passages, second passages, at least one chamber, and at least one third passage. The first channels and the chamber are formed on the first surface, the channels are formed on the second surface, and the first passages, the second passages, and the third passage penetrate through the first and second surfaces. The chamber has a closed end located opposite to the third passage and connected to at least one of the second channels via the third passage. The first and second channels are connected via the first and second passages. The chamber has a hydraulic diameter of Dh which satisfies the following condition: D h > 2 ? ? ?? ? ? g , wherein ? is surface tension, ?? is difference in density between liquid and vapor, and g is gravitational acceleration.