Patents by Inventor Shih-Lian Cheng

Shih-Lian Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11910535
    Abstract: A printed circuit board stack structure includes a first printed circuit board, a second printed circuit board, and a filling glue layer. The first printed circuit board has at least one overflow groove, and includes first pads and a retaining wall surrounding the first pads. The second printed circuit board is disposed on the first printed circuit board, and includes second pads and conductive pillars located on some of the second pads. The conductive pillars are respectively connected to some of the first pads to electrically connect the second printed circuit board to the first printed circuit board. The filling glue layer fills between the first and the second printed circuit boards, and covers the first pads, the second pads, and the conductive pillars. The retaining wall blocks the filling glue layer so that a portion of the filling glue layer is accommodated in the overflow groove.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: February 20, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Ming-Hao Wu, Shih-Lian Cheng
  • Patent number: 11895773
    Abstract: A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole, a first annular retaining wall, and a second annular retaining wall. The conductive through hole penetrates through the third dielectric layer, a second dielectric layer, and the fourth dielectric layer. The conductive through hole is electrically connected to the first external circuit layer and the second external circuit layer. The first annular retaining wall is disposed in the third dielectric layer, surrounds the conductive through hole, and is electrically connected to the first external circuit layer and the first inner circuit layer. The second annular retaining wall is disposed in the fourth dielectric layer, surrounds the conductive through hole, and connects to the second external circuit layer and the second inner circuit layer electrically.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 6, 2024
    Assignee: Unimicron Technology Corp.
    Inventor: Shih-Lian Cheng
  • Patent number: 11859302
    Abstract: An electroplating apparatus includes an anode and a cathode, a power supply, a regulating plate, and a controller. The power supply is electrically connected to the anode and the cathode. The regulating plate is disposed between the anode and the cathode. The regulating plate includes an insulation grid plate and a plurality of wires. The controller is electrically connected to the plurality of wires to control a state of an electromagnetic field around the plurality of wires. An electroplating method is also provided.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: January 2, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Heng-Ming Nien, Chih-Chiang Lu, Chih-Kai Chan, Shih-Lian Cheng
  • Publication number: 20230389172
    Abstract: Provided is a manufacturing method of circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The third substrate has an opening and includes a first dielectric layer. The opening penetrates the third substrate, and the first dielectric layer fills the opening. Multiple conductive structures are formed so that the first substrate, the second substrate, the third substrate, and the fourth substrate are electrically connected through the conductive structures to define a ground path. A conductive via structure is formed to penetrate the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate. The conductive via structure is electrically connected to the first substrate and the fourth substrate to define a signal path, and the ground path surrounds the signal path.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Chih-Chiang Lu, Heng-Ming Nien, Ching-Sheng Chen, Ching Chang, Ming-Ting Chang, Chi-Min Chang, Shao-Chien Lee, Jun-Rui Huang, Shih-Lian Cheng
  • Patent number: 11818833
    Abstract: A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole electrically connected to the first and second external circuit layers, a first annular retaining wall surrounding the conductive through hole, and a second annular retaining wall surrounding the conductive through hole. The first annular retaining wall is electrically connected to the first external circuit layer and a first inner circuit layer. The second annular retaining wall is electrically connected to the second external circuit layer and a second inner circuit layer. A first ground circuit, the first annular retaining wall, and the first inner circuit layer define a first ground path surrounding a first signal circuit. A second ground circuit, the second annular retaining wall, and the second inner circuit layer define a second ground path surrounding a second signal circuit.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: November 14, 2023
    Assignee: Unimicron Technology Corp.
    Inventor: Shih-Lian Cheng
  • Publication number: 20230328900
    Abstract: In the manufacture method of the present invention, an inner circuit structure is prepared, and a docking pad is formed on the first surface of the inner circuit structure. A release film is mounted on the first surface to cover the docking pad before mounting a build-up circuit structure upon the first surface. The release film and part of the build-up circuit structure above it are removed. The docking pad is therefore exposed and a docking opening is formed in the build-up circuit structure. The docking opening is for mounting a circuit board to be docked to form a circuit board module of the present invention.
    Type: Application
    Filed: May 11, 2022
    Publication date: October 12, 2023
    Inventor: Shih-Lian Cheng
  • Patent number: 11785707
    Abstract: Provided is a circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate is disposed between the second substrate and the fourth substrate. The third substrate has an opening penetrating the third substrate and includes a first dielectric layer filling the opening. The conductive via structure penetrates the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate, and is electrically connected to the first substrate and the fourth substrate to define a signal path. The first substrate, the second substrate, the third substrate and the fourth substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: October 10, 2023
    Assignee: Unimicron Technology Corp.
    Inventors: Chih-Chiang Lu, Heng-Ming Nien, Ching-Sheng Chen, Ching Chang, Ming-Ting Chang, Chi-Min Chang, Shao-Chien Lee, Jun-Rui Huang, Shih-Lian Cheng
  • Patent number: 11737206
    Abstract: A circuit board structure includes a first dielectric layer, first and second inner circuit layers, a conductive connection layer, a second dielectric layer, two third dielectric layers, third and fourth inner circuit layers, two conductive through vias, first and second annular retaining walls, two fourth dielectric layers, first and second external circuit layers, and third and fourth annular retaining walls. The conductive through vias penetrate the third and second dielectric layers and electrically connect the third and fourth inner circuit layers. The first and second annular retaining walls surround the conductive through vias and electrically connect the third and first and the fourth and second inner circuit layers. The third and fourth annular retaining walls are respectively disposed in the fourth dielectric layers and electrically connect the first external circuit layer and the third inner circuit layer and the second external circuit layer and the fourth inner circuit layer.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: August 22, 2023
    Assignee: Unimicron Technology Corp.
    Inventor: Shih-Lian Cheng
  • Publication number: 20230240014
    Abstract: A printed circuit board stack structure includes a first printed circuit board, a second printed circuit board, and a filling glue layer. The first printed circuit board has at least one overflow groove, and includes first pads and a retaining wall surrounding the first pads. The second printed circuit board is disposed on the first printed circuit board, and includes second pads and conductive pillars located on some of the second pads. The conductive pillars are respectively connected to some of the first pads to electrically connect the second printed circuit board to the first printed circuit board. The filling glue layer fills between the first and the second printed circuit boards, and covers the first pads, the second pads, and the conductive pillars. The retaining wall blocks the filling glue layer so that a portion of the filling glue layer is accommodated in the overflow groove.
    Type: Application
    Filed: March 3, 2022
    Publication date: July 27, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Ming-Hao Wu, Shih-Lian Cheng
  • Patent number: 11686008
    Abstract: An electroplating apparatus including an anode and a cathode, a power supply, and a regulating plate is provided. The power supply is electrically connected to the anode and the cathode. The regulating plate is arranged between the anode and the cathode. The regulating plate includes an insulating grid plate and a plurality of magnetic components. The plurality of magnetic components are uniformly and randomly arranged on the insulating grid plate. An electroplating method is also provided.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: June 27, 2023
    Assignee: Unimicron Technology Corp.
    Inventors: Heng-Ming Nien, Chih-Chiang Lu, Cho-Ying Wu, Shih-Lian Cheng
  • Publication number: 20230156909
    Abstract: A circuit board structure includes a first dielectric layer, first and second inner circuit layers, a conductive connection layer, a second dielectric layer, two third dielectric layers, third and fourth inner circuit layers, two conductive through vias, first and second annular retaining walls, two fourth dielectric layers, first and second external circuit layers, and third and fourth annular retaining walls. The conductive through vias penetrate the third and second dielectric layers and electrically connect the third and fourth inner circuit layers. The first and second annular retaining walls surround the conductive through vias and electrically connect the third and first and the fourth and second inner circuit layers. The third and fourth annular retaining walls are respectively disposed in the fourth dielectric layers and electrically connect the first external circuit layer and the third inner circuit layer and the second external circuit layer and the fourth inner circuit layer.
    Type: Application
    Filed: July 26, 2022
    Publication date: May 18, 2023
    Applicant: Unimicron Technology Corp.
    Inventor: Shih-Lian Cheng
  • Publication number: 20230156918
    Abstract: A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole, a first annular retaining wall, and a second annular retaining wall. The conductive through hole penetrates through the third dielectric layer, a second dielectric layer, and the fourth dielectric layer. The conductive through hole is electrically connected to the first external circuit layer and the second external circuit layer. The first annular retaining wall is disposed in the third dielectric layer, surrounds the conductive through hole, and is electrically connected to the first external circuit layer and the first inner circuit layer. The second annular retaining wall is disposed in the fourth dielectric layer, surrounds the conductive through hole, and connects to the second external circuit layer and the second inner circuit layer electrically.
    Type: Application
    Filed: June 30, 2022
    Publication date: May 18, 2023
    Applicant: Unimicron Technology Corp.
    Inventor: Shih-Lian Cheng
  • Publication number: 20230156908
    Abstract: A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole electrically connected to the first and second external circuit layers, a first annular retaining wall surrounding the conductive through hole, and a second annular retaining wall surrounding the conductive through hole. The first annular retaining wall is electrically connected to the first external circuit layer and a first inner circuit layer. The second annular retaining wall is electrically connected to the second external circuit layer and a second inner circuit layer. A first ground circuit, the first annular retaining wall, and the first inner circuit layer define a first ground path surrounding a first signal circuit. A second ground circuit, the second annular retaining wall, and the second inner circuit layer define a second ground path surrounding a second signal circuit.
    Type: Application
    Filed: July 18, 2022
    Publication date: May 18, 2023
    Applicant: Unimicron Technology Corp.
    Inventor: Shih-Lian Cheng
  • Publication number: 20230124913
    Abstract: An electroplating apparatus includes an anode and a cathode, a power supply, a regulating plate, and a controller. The power supply is electrically connected to the anode and the cathode. The regulating plate is disposed between the anode and the cathode. The regulating plate includes an insulation grid plate and a plurality of wires. The controller is electrically connected to the plurality of wires to control a state of an electromagnetic field around the plurality of wires. An electroplating method is also provided.
    Type: Application
    Filed: March 28, 2022
    Publication date: April 20, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Heng-Ming Nien, Chih-Chiang Lu, Chih-Kai Chan, Shih-Lian Cheng
  • Publication number: 20230124732
    Abstract: An electroplating apparatus including an anode and a cathode, a power supply, and a regulating plate is provided. The power supply is electrically connected to the anode and the cathode. The regulating plate is arranged between the anode and the cathode. The regulating plate includes an insulating grid plate and a plurality of magnetic components. The plurality of magnetic components are uniformly and randomly arranged on the insulating grid plate. An electroplating method is also provided.
    Type: Application
    Filed: May 16, 2022
    Publication date: April 20, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Heng-Ming Nien, Chih-Chiang Lu, Cho-Ying Wu, Shih-Lian Cheng
  • Publication number: 20230120741
    Abstract: Provided is an electroplating apparatus including an electroplating tank, an anode and a cathode, a power supply, and a regulating plate. The electroplating tank accommodates electrolyte. Both the anode and the cathode are disposed in the electroplating tank. The power supply is electrically connected to the anode and the cathode. The regulating plate is disposed between the anode and the cathode. The regulating plate includes a plurality of mesh openings and a plurality of metal sheets, and at least part of the metal sheets is electrically connected with the cathode. An electroplating method is also provided.
    Type: Application
    Filed: March 22, 2022
    Publication date: April 20, 2023
    Applicant: Unimicron Technology Corp.
    Inventors: Heng-Ming Nien, Cho-Ying Wu, Shih-Lian Cheng
  • Publication number: 20220232694
    Abstract: Provided is a circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate is disposed between the second substrate and the fourth substrate. The third substrate has an opening penetrating the third substrate and includes a first dielectric layer filling the opening. The conductive via structure penetrates the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate, and is electrically connected to the first substrate and the fourth substrate to define a signal path. The first substrate, the second substrate, the third substrate and the fourth substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.
    Type: Application
    Filed: October 8, 2021
    Publication date: July 21, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: Chih-Chiang Lu, Heng-Ming Nien, Ching-Sheng Chen, Ching Chang, Ming-Ting Chang, Chi-Min Chang, Shao-Chien Lee, Jun-Rui Huang, Shih-Lian Cheng
  • Publication number: 20220230949
    Abstract: A circuit board includes a first external circuit layer, a first substrate, a second substrate, a third substrate, and a conductive through hole structure. The first substrate includes conductive pillars electrically connecting the first external circuit layer and the second substrate. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The third substrate includes an insulating layer, a second external circuit layer, and conductive holes. A conductive material layer of the conductive through hole structure covers an inner wall of a through hole and electrically connects the first and the second external circuit layers to define a signal path. The first external circuit layer, the conductive pillars, the second substrate, the conductive holes and the second external circuit layer are electrically connected to define a ground path surrounding the signal path.
    Type: Application
    Filed: October 12, 2021
    Publication date: July 21, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: Chih-Chiang Lu, Hsin-Ning Liu, Jun-Rui Huang, Pei-Wei Wang, Ching Sheng Chen, Shih-Lian Cheng
  • Patent number: 11366381
    Abstract: A mask structure and a manufacturing method of the mask structure are provided. The mask structure includes a transparent substrate, a patterned metal layer, and a plurality of microlens structures. The patterned metal layer is disposed on the transparent substrate and exposing a portion of the transparent substrate. The microlens structures are disposed on the transparent substrate exposed by a portion of the patterned metal layer and being in contact with the portion of the patterned metal layer.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: June 21, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Pu-Ju Lin, Shih-Lian Cheng, Yu-Hua Chen, Cheng-Ta Ko, Jui-Jung Chien, Wei-Tse Ho
  • Patent number: 10999935
    Abstract: A manufacturing method of a circuit board including the following steps is provided. A carrier substrate is provided. A patterned photoresist layer is formed on the carrier substrate. An adhesive layer is formed on the top surface of the patterned photoresist layer. A dielectric substrate is provided. A circuit pattern and a dielectric layer covering the circuit pattern are formed on the dielectric substrate, wherein the dielectric layer has an opening exposing a portion of the circuit pattern. The adhesive layer is adhered to the dielectric layer in a direction that the adhesive layer faces of the dielectric layer. The carrier substrate is removed. A patterned metal layer is formed on a region exposed by the patterned photoresist layer. The patterned photoresist layer is removed. The adhesive layer is removed.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: May 4, 2021
    Assignee: Unimicron Technology Corp.
    Inventor: Shih-Lian Cheng