Patents by Inventor Shih-Liang Liang

Shih-Liang Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor component having test pads and method and apparatus for testing same
    Patent number: 7737439
    Abstract: A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. In another example, a substrate is fabricated having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. An insulating layer is formed over the plurality of test pads.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: June 15, 2010
    Assignee: XILINX, Inc.
    Inventors: Mohsen Hossein Mardi, Jae Cho, Xin X. Wu, Chih-Chung Wu, Shih-Liang Liang, Sanjiv Stokes, Hassan K. Bazargan
  • Semiconductor component having test pads and method and apparatus for testing same
    Publication number: 20070221920
    Abstract: A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. In another example, a substrate is fabricated having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. An insulating layer is formed over the plurality of test pads.
    Type: Application
    Filed: May 17, 2007
    Publication date: September 27, 2007
    Applicant: Xilinx, Inc.
    Inventors: Mohsen Mardi, Jae Cho, Xin Wu, Chih-Chung Wu, Shih-Liang Liang, Sanjiv Stokes, Hassan Bazargan
  • Semiconductor component having test pads and method and apparatus for testing same
    Publication number: 20070218573
    Abstract: A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. In another example, a substrate is fabricated having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. An insulating layer is formed over the plurality of test pads.
    Type: Application
    Filed: May 17, 2007
    Publication date: September 20, 2007
    Applicant: Xilinx, Inc.
    Inventors: Mohsen Mardi, Jae Cho, Xin Wu, Chih-Chung Wu, Shih-Liang Liang, Sanjiv Stokes, Hassan Bazargan
  • Semiconductor component having test pads and method and apparatus for testing same
    Patent number: 7235412
    Abstract: A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. In another example, a substrate is fabricated having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. An insulating layer is formed over the plurality of test pads.
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: June 26, 2007
    Assignee: XILINX, Inc.
    Inventors: Mohsen Hossein Mardi, Jae Cho, Xin X. Wu, Chih-Chung Wu, Shih-Liang Liang, Sanjiv Stokes, Hassan K. Bazargan