Patents by Inventor Shih-Pen Chen

Shih-Pen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8428911
    Abstract: A testing method for carrying out an accuracy testing operation on a system time signal of a computer device under test includes the following steps. First, first and second clock cycle parameters of an operation clock signal (CPU clock) are respectively recorded in response to first and second triggering edges triggered by an external reference time signal. Next, a reference clock cycle parameter is determined according to the first and second clock cycle parameters. Then, third and fourth clock cycle parameters of the operation clock signal are respectively recorded in response to third and fourth triggering edges triggered by the system time signal. Next, a to-be-measured clock cycle parameter is obtained according to the third and fourth clock cycle parameters. Thereafter, error information of the system time signal is obtained according to the to-be-measured clock cycle parameter and the reference clock cycle parameter.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: April 23, 2013
    Assignee: Quanta Computer Inc.
    Inventors: Te-Hsin Chen, Shih-Pen Chen
  • Publication number: 20110231154
    Abstract: A testing method for carrying out an accuracy testing operation on a system time signal of a computer device under test includes the following steps. First, first and second clock cycle parameters of an operation clock signal (CPU clock) are respectively recorded in response to first and second triggering edges triggered by an external reference time signal. Next, a reference clock cycle parameter is determined according to the first and second clock cycle parameters. Then, third and fourth clock cycle parameters of the operation clock signal are respectively recorded in response to third and fourth triggering edges triggered by the system time signal. Next, a to-be-measured clock cycle parameter is obtained according to the third and fourth clock cycle parameters. Thereafter, error information of the system time signal is obtained according to the to-be-measured clock cycle parameter and the reference clock cycle parameter.
    Type: Application
    Filed: December 10, 2010
    Publication date: September 22, 2011
    Applicant: Quanta Computer Inc.
    Inventors: Te-Hsin CHEN, Shih-Pen Chen