Abstract: A Dynamic Random Access Memory (DRAM) capacitor and a preparation method therefor are provided. The DRAM capacitor includes a dielectric layer, and the dielectric layer includes a high dielectric material layer, and low dielectric loss material layers provided on both side surfaces of the high dielectric material layer.

Abstract: Provided is a method for simulating electricity of a wafer chip. The method includes: a database is constructed, the database including spectroscopic data of a semiconductor structure of the wafer chip obtained from a target key process, actual electrical data of the wafer chip, and a correspondence between the spectroscopic data and the actual electrical data; the target key process is performed on a target wafer chip to obtain the spectroscopic data of the semiconductor structure of the target wafer chip obtained from the target key process, the spectroscopic data being target spectroscopic data; the electrical data of the target wafer chip is simulated based on the obtained target spectroscopic data and the database, the electrical data being target electrical data.

Abstract: A preparation method of the semiconductor structure includes: the substrate including a first area to be etched and a second area to be etched outside the first area to be etched, the etching rate of the first area to be etched and the second area to be etched are different, simultaneously etching the first area to be etched and the second area to be etched at least twice, until an etching depth of one of the first area to be etched and the second area to be etched with a less etching rate is equal to a target etching depth; in at least two etching processes, backfilling a sacrificial material to the first area to be etched and the second area to be etched after a previous etching is completed, removing part of the sacrificial material in a next etching.

Abstract: The embodiments of the present application disclose a contact structure forming method, a contact structure, and a semiconductor device. The method includes: providing a substrate, the substrate having a plurality of isolation regions therein, the isolation regions isolating an active region on the substrate into several portions; etching the active regions and the isolation regions simultaneously by the first etching processing, to form a first contact hole, a protruding active region being formed at the active region in the bottom of the first contact hole; depositing a first dielectric layer to cover the sidewall and bottom of the first contact hole; and etching the bottom of the first contact hole by the second etching processing, to form a contact structure having a target depth.

Abstract: Embodiments of this application provide a method, an apparatus and a device for measuring a semiconductor structure. Before measurement of a to-be-measured semiconductor structure, a reference semiconductor structure corresponding to the to-be-measured semiconductor structure is set, and a first simulation model corresponding to the to-be-measured semiconductor structure and a second simulation model corresponding to the reference semiconductor structure are established, some structure parameters of the to-be-measured semiconductor structure have parameter values different from those of corresponding structure parameters of the reference semiconductor structure.

Abstract: Provided is a method for simulating electricity of a wafer chip. The method includes: a database is constructed, the database including spectroscopic data of a semiconductor structure of the wafer chip obtained from a target key process, actual electrical data of the wafer chip, and a correspondence between the spectroscopic data and the actual electrical data; the target key process is performed on a target wafer chip to obtain the spectroscopic data of the semiconductor structure of the target wafer chip obtained from the target key process, the spectroscopic data being target spectroscopic data; the electrical data of the target wafer chip is simulated based on the obtained target spectroscopic data and the database, the electrical data being target electrical data.

Abstract: A Dynamic Random Access Memory (DRAM) capacitor and a preparation method therefor are provided. The DRAM capacitor includes a dielectric layer, and the dielectric layer includes a high dielectric material layer, and low dielectric loss material layers provided on both side surfaces of the high dielectric material layer.