Patents by Inventor Shih-Ting Huang

Shih-Ting Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11947634
    Abstract: An image object classification method and system are disclosed. The method is executed by a processor coupled to a memory. The method includes: providing an image file including at least one image object, performing a process of extracting multiple binary-classified characteristics on the image object to obtain a plurality of first results independent of each other in categories, combining the plurality of first results in a manner of dimensionality reduction based on concatenation, performing a process of characteristics abstraction on the combined first results to obtain a second result, and performing a process of characteristics integration on the plurality of first results and the second result in a manner of dot product of matrices to obtain a classification result.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: April 2, 2024
    Assignee: Footprintku Inc.
    Inventors: Yan-Jhih Wang, Kuan-Hsiang Tseng, Jun-Qiang Wei, Shih-Feng Huang, Tzung-Pei Hong, Yi-Ting Chen
  • Patent number: 11948896
    Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
  • Patent number: 11948581
    Abstract: A smart interpreter engine is provided. The smart interpreter engine includes a speech to text converter, a natural language processing module and a translator. The speech to text converter is utilized for converting speech data corresponding to a first language into text data corresponding to the first language. The natural language processing module is utilized for converting the text data corresponding to the first language into glossary text data corresponding to the first language according to a game software. The translator is utilized for converting the glossary text data corresponding to the first language into text data corresponding to a second language.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: April 2, 2024
    Assignee: ACER INCORPORATED
    Inventors: Gianna Tseng, Shih-Cheng Huang, Shang-Yao Lin, Szu-Ting Chou
  • Patent number: 11947254
    Abstract: A method for mask data synthesis and mask making includes calibrating an optical proximity correction (OPC) model by adjusting a plurality of parameters including a first parameter and a second parameter, wherein the first parameter indicates a long-range effect caused by an electron-beam lithography tool for making a mask used to manufacture a structure, and the second parameter indicates a geometric feature of a structure or a manufacturing process to make the structure, generating a device layout, calculating a first grid pattern density map of the device layout, generating a long-range correction map, at least based on the calibrated OPC model and the first grid pattern density map of the device layout, and performing an OPC to generate a corrected mask layout, at least based on the generated long-range correction map and the calibrated OPC model.
    Type: Grant
    Filed: August 1, 2022
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsu-Ting Huang, Shih-Hsiang Lo, Ru-Gun Liu
  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Publication number: 20240091764
    Abstract: A combinable nucleic acid pre-processing apparatus includes a sample transfer chamber transferring a sample from a sampling tube to a nucleic acid extraction kit, a nucleic acid extraction chamber performing a nucleic acid extraction of the sample in the nucleic acid extraction kit for obtaining a nucleic acid extract, an assay setup chamber preparing reagents and transferring reagents and the nucleic acid extract to an assay plate, and at least two bridging modules respectively disposed between the sample transfer chamber and the nucleic acid extraction chamber and between the nucleic acid extraction chamber and the assay setup chamber. The sample transfer chamber, the nucleic acid extraction chamber and the assay setup chamber are separated and operated independently. Three chambers are connected through the bridging modules, so the nucleic acid extraction kit can be sequentially moved in the sample transfer chamber, the nucleic acid extraction chamber and the assay setup chamber.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 21, 2024
    Inventors: Chien-Ting Liu, Shih-Fang Peng, Song-Bin Huang, Guo-Wei Huang, Jen-Chih Tsai
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 11930157
    Abstract: The disclosure provides an eye tracking method and an eye tracking device. The method includes obtaining a reference interpupillary distance value; taking images of a user of a 3D display, and finding a first eye pixel coordinate corresponding to a first eye of the user and a second eye pixel coordinate corresponding to a second eye of the user in each image; detecting a first and a second eye spatial coordinates of the first and the second eyes, and determining projection coordinates based on the first eye spatial coordinate, the second eye spatial coordinate, and optical parameters of image capturing elements; determining an optimization condition related to the first and second eye spatial coordinates based on the first and second eye pixel coordinates, the projection coordinates, and the reference interpupillary distance value of each image; and optimizing the first and second eye spatial coordinates based on the optimization condition.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: March 12, 2024
    Assignee: Acer Incorporated
    Inventors: Yen-Hsien Li, Shih-Ting Huang, Chao-Shih Huang
  • Patent number: 11923315
    Abstract: Semiconductor package includes a pair of dies, a redistribution structure, and a conductive plate. Dies of the pair of dies are disposed side by side. Each die includes a contact pad. Redistribution structure is disposed on the pair of dies, and electrically connects the pair of dies. Redistribution structure includes an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. Innermost dielectric layer is closer to the pair of dies. Redistribution conductive layer extends between the innermost dielectric layer and the outermost dielectric layer. Outermost dielectric layer is furthest from the pair of dies. Conductive plate is electrically connected to the contact pads of the pair of dies. Conductive plate extends over the outermost dielectric layer of the redistribution structure and over the pair of dies. Vertical projection of the conductive plate falls on spans of the dies of the pair of dies.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang, Wei-Ting Chen, Chien-Hsun Chen, Shih-Ya Huang
  • Patent number: 11923866
    Abstract: The present invention discloses a DAC method having signal calibration mechanism is provided. Operation states of current sources are controlled to generate an output analog signal by a DAC circuit according to a codeword of an input digital signal. An echo signal is generated by an echo transmission circuit according to the output analog signal. The codeword is mapped to generate an offset signal by a calibration circuit according to a codeword offset mapping table. The offset signal is processed to generate an echo-canceling signal by an echo-canceling circuit. By a calibration parameter calculation circuit, offset amounts are generated according to a difference between the echo signal and the echo-canceling signal, the offset amounts are grouped to perform statistic operation according to the operation states and current offset values are calculated according to calculation among groups and converted to codeword offset values to update the codeword offset mapping table.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: March 5, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsuan-Ting Ho, Shih-Hsiung Huang, Liang-Wei Huang
  • Patent number: 11915977
    Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chih-Hui Huang, Sheng-Chau Chen, Shih Pei Chou, Chia-Chieh Lin
  • Publication number: 20240047512
    Abstract: A method of forming a semiconductor structure includes following steps. A substrate is provided. The substrate has an active region, an isolation structure adjacent to the active region, and a contact on the active region. A dielectric stack is formed on the substrate. A poly layer is formed on the dielectric stack. The poly layer and the dielectric stack are etched to form an opening to expose the contact of the substrate. A conductive film is formed in the opening and an ALD oxide layer is deposited on a sidewall of the opening. In addition, a semiconductor structure is also disclosed herein.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Inventor: Shih-Ting HUANG
  • Patent number: 11875532
    Abstract: The disclosure provides a feature point position detection method and an electronic device. The method includes: obtaining a plurality of first relative positions of a plurality of feature points on a specific object relative to a first image capturing element; obtaining a plurality of second relative positions of the plurality of feature points on the specific object relative to a second image capturing element; and in response to determining that the first image capturing element is unreliable, estimating a current three-dimensional position of each feature point based on a historical three-dimensional position and the plurality of second relative positions of each feature point.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: January 16, 2024
    Assignee: Acer Incorporated
    Inventors: Yen-Hsien Li, Shih-Ting Huang, Chao-Shih Huang
  • Patent number: 11846729
    Abstract: A virtual reality positioning device including a casing, a plurality of lenses, and a plurality of optical positioning components is provided. The casing has a plurality of holes. The lenses are installed in the holes, respectively, where a field angle of each of the lenses is greater than or equal to 120 degrees and less than or equal to 160 degrees, and the lenses include convex lenses or Fresnel lenses. The optical positioning components are installed in the casing and aligned to the lenses, respectively. In addition, a virtual reality positioning system and manufacturing method of a virtual reality positioning device are provided.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: December 19, 2023
    Assignee: Acer Incorporated
    Inventors: Li Lin, Ker-Wei Lin, Chun-Ta Chen, Chun-Yu Chen, Hao-Ming Chang, Chun-Hsien Chen, Shih-Ting Huang, Hui-Yen Wang
  • Patent number: 11830907
    Abstract: A method of forming a semiconductor structure includes following steps. A substrate is provided. The substrate has an active region, an isolation structure adjacent to the active region, and a contact on the active region. A dielectric stack is formed on the substrate. A poly layer is formed on the dielectric stack. The poly layer and the dielectric stack are etched to form an opening to expose the contact of the substrate. A conductive film is formed in the opening and an ALD oxide layer is deposited on a sidewall of the opening. In addition, a semiconductor structure is also disclosed herein.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: November 28, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Shih-Ting Huang
  • Publication number: 20230326957
    Abstract: A method of forming a semiconductor structure includes following steps. A substrate is provided. The substrate has an active region, an isolation structure adjacent to the active region, and a contact on the active region. A dielectric stack is formed on the substrate. A poly layer is formed on the dielectric stack. The poly layer and the dielectric stack are etched to form an opening to expose the contact of the substrate. A conductive film is formed in the opening and an ALD oxide layer is deposited on a sidewall of the opening. In addition, a semiconductor structure is also disclosed herein.
    Type: Application
    Filed: April 8, 2022
    Publication date: October 12, 2023
    Inventor: Shih-Ting HUANG
  • Patent number: 11777210
    Abstract: A mobile device includes a ground element, a first radiation element, a second radiation element, and a dielectric substrate. The first radiation element has a feeding point. The first radiation element includes a meandering portion. The second radiation element is coupled to the feeding point, and is at least partially surrounded by the first radiation element. A coupling gap is formed between the first radiation element and the second radiation element. The ground element, the first radiation element, and the second radiation element are all disposed on the dielectric substrate. A planar antenna structure is formed by the first radiation element and the second radiation element. The planar antenna structure covers a TETRA (Terrestrial Trunked Radio) frequency band and a GPS (Global Positioning System) frequency band.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: October 3, 2023
    Assignee: WISTRON CORP.
    Inventors: Shih-Ting Huang, Chia-Wei Su, Po-Tsang Lin
  • Patent number: 11776219
    Abstract: Augmented reality glasses including a first image source, a second image source and a lens set are provided. The first image source emits a first image beam. The second image source emits a second image beam. The lens set includes a first lens and a second lens and disposed on the path of the image beams. A gap is disposed between the first lens and the second lens. The refractive index of the gap is lower than that of the first lens. The image beams enter the lens set at an incident surface of the lens set, are reflected at a first surface of the first lens, and exit the lens set at an exit surface. The optical path length of the first image beam from the first image source to the eyes is different from that of the second image beam from the second image source to the eyes.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: October 3, 2023
    Assignee: Acer Incorporated
    Inventors: Yi-Jung Chiu, Shih-Ting Huang, Yen-Hsien Li, Tsung-Wei Tu, Wei-Kuo Shih
  • Patent number: 11754768
    Abstract: An augmented reality display device, which is configured to provide an augmented reality image to an eye of a user, includes a display module and multiple mirror sets. The display module includes a projector and multiple switching elements. The projector provides an original image beam. The switching elements are deposed sequentially on a path of the original image beam. Each of the switching elements reflects or transmits the original image beam. Reflection paths of each ray of the original image beam on the switching elements intersect at one point to generate multiple image beams. The mirror sets are disposed on paths of the image beams. The image beams are reflected at different angles on the mirror sets, and the mirror sets reflect the image beams to the eye.
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: September 12, 2023
    Assignee: Acer Incorporated
    Inventors: Tsung-Wei Tu, Yi-Jung Chiu, Shih-Ting Huang, Yen-Hsien Li
  • Publication number: 20230261378
    Abstract: A mobile device includes a ground element, a first radiation element, a second radiation element, and a dielectric substrate. The first radiation element has a feeding point. The first radiation element includes a meandering portion. The second radiation element is coupled to the feeding point, and is at least partially surrounded by the first radiation element. A coupling gap is formed between the first radiation element and the second radiation element. The ground element, the first radiation element, and the second radiation element are all disposed on the dielectric substrate. A planar antenna structure is formed by the first radiation element and the second radiation element. The planar antenna structure covers a TETRA (Terrestrial Trunked Radio) frequency band and a GPS (Global Positioning System) frequency band.
    Type: Application
    Filed: March 31, 2022
    Publication date: August 17, 2023
    Inventors: Shih-Ting HUANG, Chia-Wei SU, Po-Tsang LIN