Abstract: A composition includes an active composition. The active composition includes a niobium-titanium oxide and a silicon active material, or includes a doped niobium-titanium oxide and the silicon active material. The niobium-titanium oxide includes niobium element, titanium element and oxygen element. The doped niobium-titanium oxide includes niobium element, titanium element and oxygen element.

Abstract: A method for dicing a wafer stack having a first wafer and a second wafer stacked under the first wafer includes the steps of cutting the first wafer by a cutting blade to form a first cutting location on the first wafer, then cutting the first wafer by a laser stealth dicing process to form a second cutting location on the first wafer, and then removing the portion defined by the first and second cutting locations. In this way, it can avoid the to-be-removed portion from flying off from the first wafer during cutting.

Abstract: A ground-enhanced semiconductor package and a lead frame used in the package are provided. The semiconductor package includes a lead frame having a die pad, a plurality of tie bars connected with and supporting the die pad, a plurality of leads surrounding the die pad, and a ground structure, wherein the ground structure comprises at least one of first ground portions connected to the tie bars, and/or at least one of second ground portions connected to the die pad, and wherein the first ground portions are separate from each other, and the second ground portions are separate from each other; at least one chip mounted on the die pad and electrically connected to the leads and the ground structure; and an encapsulation body for encapsulating the chip and the lead frame. The separately-arranged ground portions allow thermal stresses to be released from the ground structure without rendering deformation issues.

Abstract: A ground-enhanced semiconductor package and a lead frame used in the package are provided. The semiconductor package includes a lead frame having a die pad, a plurality of tie bars connected with and supporting the die pad, a plurality of leads surrounding the die pad, and a ground structure, wherein the ground structure comprises at least one of first ground portions connected to the tie bars, and/or at least one of second ground portions connected to the die pad, and wherein the first ground portions are separate from each other, and the second ground portions are separate from each other; at least one chip mounted on the die pad and electrically connected to the leads and the ground structure; and an encapsulation body for encapsulating the chip and the lead frame. The separately-arranged ground portions allow thermal stresses to be released from the ground structure without rendering deformation issues.