Patents by Inventor Shih-Tsung Chen

Shih-Tsung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240407126
    Abstract: A switching board and a soldering method thereof are provided. The switching board includes a circuit board having a board body and a first metal ring, where the board body has a first surface, and the first metal ring is formed on the first surface and surrounds a periphery of the board body. The switching board further includes a first metal element disposed on the first surface and fastened to the first metal ring by soldering. The switching board has a high pressure resistance and a low leakage rate.
    Type: Application
    Filed: August 23, 2023
    Publication date: December 5, 2024
    Inventors: Cheng-En LIU, Chun-Han CHEN, Hao-Yang HUANG, Yi-Tsang HSIAO, Jui-Chung LAI, Kai-Hsiang TSENG, Shih-Tsung CHEN
  • Publication number: 20240387147
    Abstract: A cantilever for gas flow direction control configured to support an electrode housing bowl in an associated etch process chamber. The cantilever may have a cross-section that is circular, elliptical, or airfoil shaped. The shape of the cantilever induces the flow of gas and etch products within the chamber around the cantilever, reducing turbulence around the edge of a wafer.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Inventors: Chien-Liang Chen, Chien-Yu Wang, Wei-Da Chen, Yu-Ning Cheng, Shih-tsung Chen, Yung-Yao Lee
  • Publication number: 20240377759
    Abstract: To improve quality assurance and durability of coated components, a multifaceted inspection coupon is provided that includes opposing flat surfaces, separated by sides which include one or more curves or fillets representing surfaces of the coated components to be inspected. The inspection coupon is coated on all sides in the same manner as the components to be inspected, whereby later analysis of the coupon provides quality assurance of all coated surfaces of the components at once.
    Type: Application
    Filed: May 9, 2023
    Publication date: November 14, 2024
    Inventors: Yu-Wei HSU, Chien-Liang CHEN, Shih-Tsung CHEN, Chien-Yu WANG
  • Patent number: 12020906
    Abstract: A grounding cap module includes a main body, a frame portion, and a cap portion. The main body includes a first opening penetrating the main body and a grounding portion disposed on a periphery of the main body and configured to be electrically grounded. The frame portion is disposed on the main body and includes a second opening aligned with the first opening. The cap portion is disposed on the frame portion and covers the second opening, wherein the first opening, the second opening and the cap portion define a receiving cavity. A gas injection device and an etching apparatus using the same are also provided.
    Type: Grant
    Filed: December 13, 2022
    Date of Patent: June 25, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Shi Liu, Shih-Tsung Chen
  • Patent number: 11875973
    Abstract: Methods for preparing a void-free protective coating are disclosed herein. The void-free protective coating is used on a dielectric window having a central hole, which is used in a plasma treatment tool. A first protective coating layer is applied to the window, leaving an uncoated annular retreat area around the central hole. The first protective coating layer is polished to produce a flat surface and fill in any voids on the window. A second protective coating layer is then applied upon the flat surface of the first protective coating layer to obtain the void-free coating. This increases process uptime and service lifetime of the dielectric window and the plasma treatment tool.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: January 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Tsung Chen, Tsung-Cheng Ho, Chien-Yu Wang, Yen-Shih Wang, Jiun-Rong Pai, Yeh-Chieh Wang
  • Publication number: 20230367339
    Abstract: Methods for preparing a void-free protective coating are disclosed herein. The void-free protective coating is used on a dielectric window having a central hole, which is used in a plasma treatment tool. A first protective coating layer is applied to the window, leaving an uncoated annular retreat area around the central hole. The first protective coating layer is polished to produce a flat surface and fill in any voids on the window. A second protective coating layer is then applied upon the flat surface of the first protective coating layer to obtain the void-free coating. This increases process uptime and service lifetime of the dielectric window and the plasma treatment tool.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Inventors: Shih-Tsung Chen, Yeh-Chieh Wang, Yen-Shih Wang, Chien-Yu Wang, Jiun-Rng Pai, Tsung-Cheng Ho
  • Publication number: 20230182181
    Abstract: This invention provides a method and a system for cleaning a container for storing wafers or masks. A contained with lid is washed directly after the container is loaded with lid opened in the cleaning system. Gas exchange rate in the washing station can be increased such that particles or AMC inside the container or attached to the lid can be carried out more easily. Then, contamination-free gas is purged to the container as well as lid in a high temperature environment. A vacuum station can be optionally adapted between the washing station and the contamination-free gas purging station to enhance the cleanliness of the container.
    Type: Application
    Filed: March 9, 2022
    Publication date: June 15, 2023
    Inventors: Yi-Chuan PENG, Ko-Hsi CHAN, Shih Tsung CHEN
  • Patent number: 11650576
    Abstract: A server for knowledge recommendation for defect review. The server includes a processor electronically coupled to an electronic storage device storing a plurality of knowledge files related to wafer defects. The processor is configured to execute a set of instruction to cause the server to: receive a request for knowledge recommendation for inspecting an inspection image from a defect classification server; search for a knowledge file in the electronic storage device that matches the inspection image; and transmit the search result to the defect classification server.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: May 16, 2023
    Assignee: ASML Netherlands B.V.
    Inventors: Wei Fang, Cho Huak Teh, Robeter Jian, Yi-Ying Wang, Shih-Tsung Chen, Jian-Min Liao, Chuan Li, Zhaohui Guo, Pang-Hsuan Huang, Shao-Wei Lai, Shih-Tsung Hsu
  • Publication number: 20230110291
    Abstract: A grounding cap module includes a main body, a frame portion, and a cap portion. The main body includes a first opening penetrating the main body and a grounding portion disposed on a periphery of the main body and configured to be electrically grounded. The frame portion is disposed on the main body and includes a second opening aligned with the first opening. The cap portion is disposed on the frame portion and covers the second opening, wherein the first opening, the second opening and the cap portion define a receiving cavity. A gas injection device and an etching apparatus using the same are also provided.
    Type: Application
    Filed: December 13, 2022
    Publication date: April 13, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Shi Liu, Shih-Tsung Chen
  • Publication number: 20230025296
    Abstract: Methods for preparing a void-free protective coating are disclosed herein. The void-free protective coating is used on a dielectric window having a central hole, which is used in a plasma treatment tool. A first protective coating layer is applied to the window, leaving an uncoated annular retreat area around the central hole. The first protective coating layer is polished to produce a flat surface and fill in any voids on the window. A second protective coating layer is then applied upon the flat surface of the first protective coating layer to obtain the void-free coating. This increases process uptime and service lifetime of the dielectric window and the plasma treatment tool.
    Type: Application
    Filed: February 8, 2022
    Publication date: January 26, 2023
    Inventors: Shih-Tsung Chen, Tsung-Cheng Ho, Chien-Yu Wang, Yen-Shih Wang, Jiun-Rong Pai, Yeh-Chieh Wang
  • Patent number: 11551911
    Abstract: A grounding cap module includes a main body, a frame portion, and a cap portion. The main body includes a first opening penetrating the main body and a grounding portion disposed on a periphery of the main body and configured to be electrically grounded. The frame portion is disposed on the main body and includes a second opening aligned with the first opening. The cap portion is disposed on the frame portion and covers the second opening, wherein the first opening, the second opening and the cap portion define a receiving cavity. A gas injection device and an etching apparatus using the same are also provided.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: January 10, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Shi Liu, Shih-Tsung Chen
  • Publication number: 20220359164
    Abstract: A cantilever for gas flow direction control configured to support an electrode housing bowl in an associated etch process chamber. The cantilever may have a cross-section that is circular, elliptical, or airfoil shaped. The shape of the cantilever induces the flow of gas and etch products within the chamber around the cantilever, reducing turbulence around the edge of a wafer.
    Type: Application
    Filed: August 18, 2021
    Publication date: November 10, 2022
    Inventors: Chien-Liang Chen, Chien-Yu Wang, Wei-Da Chen, Yu-Ning Cheng, Shih-tsung Chen, Yung-Yao Lee
  • Publication number: 20220351948
    Abstract: An apparatus includes a chamber, a pedestal configured to receive and support a semiconductor wafer in the chamber, and an edge ring disposed over the pedestal. The edge ring includes a first portion having a first top surface, a second portion coupled to the first portion and having a second top surface lower than the first top surface, and a recess defined in the first portion. The second top surface is under the semiconductor wafer. The recess has a depth, and a distance between the pedestal and an inner surface of the recess is substantially equal to the depth of the recess.
    Type: Application
    Filed: July 12, 2022
    Publication date: November 3, 2022
    Inventors: HUNG-BIN LIN, LI-CHAO YIN, SHIH-TSUNG CHEN, YU-LUNG YANG, YING CHIEH WANG, BING KAI HUANG, SU-YU YEH
  • Patent number: 11416979
    Abstract: A defect displaying method is provided in the disclosure. The method comprises acquiring defect group information from an image of a wafer, wherein the defect group information includes a set of correlations between a plurality of defects identified from the image and one or more corresponding assigned defect types and displaying at least some of the plurality of defects according to their corresponding assigned defect types.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: August 16, 2022
    Assignee: ASML Netherlands B.V.
    Inventors: Wei Fang, Cho Huak Teh, Ju Hao Chien, Yi-Ying Wang, Shih-Tsung Chen, Jian-Min Liao, Chuan Li, Zhaohui Guo, Pang-Hsuan Huang, Shao-Wei Lai, Shih-Tsung Hsu
  • Publication number: 20210249232
    Abstract: An apparatus includes a chamber, a pedestal configured to receive and support a semiconductor wafer in the chamber, and an edge ring disposed over the pedestal. The edge ring includes a first portion having a first top surface, a second portion coupled to the first portion and having a second top surface lower than the first top surface, and a recess defined in the first portion. The second top surface is under the semiconductor wafer. The recess has a depth, and a distance between the pedestal and an inner surface of the recess is substantially equal to the depth of the recess.
    Type: Application
    Filed: February 10, 2020
    Publication date: August 12, 2021
    Inventors: HUNG-BIN LIN, LI-CHAO YIN, SHIH-TSUNG CHEN, YU-LUNG YANG, YING CHIEH WANG, BING KAI HUANG, SU-YU YEH
  • Publication number: 20200402763
    Abstract: A grounding cap module includes a main body, a frame portion, and a cap portion. The main body includes a first opening penetrating the main body and a grounding portion disposed on a periphery of the main body and configured to be electrically grounded. The frame portion is disposed on the main body and includes a second opening aligned with the first opening. The cap portion is disposed on the frame portion and covers the second opening, wherein the first opening, the second opening and the cap portion define a receiving cavity. A gas injection device and an etching apparatus using the same are also provided.
    Type: Application
    Filed: September 9, 2020
    Publication date: December 24, 2020
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Shi Liu, Shih-Tsung Chen
  • Patent number: 10818479
    Abstract: A grounding cap module includes a main body, a frame portion, and a cap portion. The main body includes a first opening penetrating the main body and a grounding portion disposed on a periphery of the main body and configured to be electrically grounded. The frame portion is disposed on the main body and includes a second opening aligned with the first opening. The cap portion is disposed on the frame portion and covers the second opening, wherein the first opening, the second opening and the cap portion define a receiving cavity. A gas injection device and an etching apparatus using the same are also provided.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: October 27, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, Ltd.
    Inventors: Li-Shi Liu, Shih-Tsung Chen
  • Publication number: 20190370950
    Abstract: A defect displaying method is provided in the disclosure. The method comprises acquiring defect group information from an image of a wafer, wherein the defect group information includes a set of correlations between a plurality of defects identified from the image and one or more corresponding assigned defect types and displaying at least some of the plurality of defects according to their corresponding assigned defect types.
    Type: Application
    Filed: January 18, 2018
    Publication date: December 5, 2019
    Inventors: Wei FANG, Cho Huak TEH, Ju Hao CHIEN, Yi-Ying WANG, Shih-Tsung CHEN, Jian-Min LIAO, Chuan LI, Zhaohui GUO, Pang-Hsuan HUANG, Shao-Wei LAI, Shih-Tsung HSU
  • Publication number: 20190362488
    Abstract: A server for knowledge recommendation for defect review. The server includes a processor electronically coupled to an electronic storage device storing a plurality of knowledge files related to wafer defects. The processor is configured to execute a set of instruction to cause the server to: receive a request for knowledge recommendation for inspecting an inspection image from a defect classification server; search for a knowledge file in the electronic storage device that matches the inspection image; and transmit the search result to the defect classification server.
    Type: Application
    Filed: January 15, 2018
    Publication date: November 28, 2019
    Inventors: Wei FANG, Cho Huak TEH, Robeter JIAN, Yi-Ying WANG, Shih-Tsung CHEN, Jian-Min LIAO, Chuan LI, Zhaohui GUO, Pang-Hsuan HUANG, Shao-Wei LAI, Shih-Tsung HSU
  • Publication number: 20190148111
    Abstract: A grounding cap module includes a main body, a frame portion, and a cap portion. The main body includes a first opening penetrating the main body and a grounding portion disposed on a periphery of the main body and configured to be electrically grounded. The frame portion is disposed on the main body and includes a second opening aligned with the first opening. The cap portion is disposed on the frame portion and covers the second opening, wherein the first opening, the second opening and the cap portion define a receiving cavity. A gas injection device and an etching apparatus using the same are also provided.
    Type: Application
    Filed: January 19, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Li-Shi Liu, Shih-Tsung Chen