Patents by Inventor Shih-Tsung Hsiao

Shih-Tsung Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9864363
    Abstract: A process control method is provided for performing a deposition process on a plurality of wafers of a batch. The process control method includes: deciding a placement location of the wafers of the batch according to the history information of a tool and the product information of the batch; calculating a target value of each placement location according to the placement location of the wafers of the batch and the history information of the tool; calculating a process parameter according to the history information of the tool, the product information of the batch, and the target value of each placement location; and performing a deposition process according to the placement location of the wafers of the batch and the process parameter.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: January 9, 2018
    Assignee: Powerchip Technology Corporation
    Inventors: Jyun-Da Wu, Shih-Tsung Hsiao, Chien-Chung Chen, Huang-Wei Wu, Huang-Wen Chen, Sheng-Hsiu Peng
  • Patent number: 9709335
    Abstract: A dispatch control method for a furnace process including the following steps is provided. Before a plurality of lots of wafers is loaded into a furnace, the characteristic variation value of each of the plurality of lots of wafers is calculated. The plurality of lots of wafers is ordered according to the size of the characteristic variation values. The plurality of lots of wafers is placed in the furnace in a descending order of the characteristic variation values corresponding to a plurality of locations in the furnace causing the characteristic variation values to change from smaller to larger.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: July 18, 2017
    Assignee: Powerchip Technology Corporation
    Inventors: Jyun-Da Wu, Shih-Tsung Hsiao, Chien-Chung Chen
  • Publication number: 20160047045
    Abstract: A process control method is provided for performing a deposition process on a plurality of wafers of a batch. The process control method includes: deciding a placement location of the wafers of the batch according to the history information of a tool and the product information of the batch; calculating a target value of each placement location according to the placement location of the wafers of the batch and the history information of the tool; calculating a process parameter according to the history information of the tool, the product information of the batch, and the target value of each placement location; and performing a deposition process according to the placement location of the wafers of the batch and the process parameter.
    Type: Application
    Filed: October 31, 2014
    Publication date: February 18, 2016
    Inventors: Jyun-Da Wu, Shih-Tsung Hsiao, Chien-Chung Chen, Huang-Wei Wu, Huang-Wen Chen, Sheng-Hsiu Peng
  • Publication number: 20160025414
    Abstract: A dispatch control method for a furnace process including the following steps is provided. Before a plurality of lots of wafers is loaded into a furnace, the characteristic variation value of each of the plurality of lots of wafers is calculated. The plurality of lots of wafers is ordered according to the size of the characteristic variation values. The plurality of lots of wafers is placed in the furnace in a descending order of the characteristic variation values corresponding to a plurality of locations in the furnace causing the characteristic variation values to change from smaller to larger.
    Type: Application
    Filed: October 9, 2014
    Publication date: January 28, 2016
    Inventors: Jyun-Da Wu, Shih-Tsung Hsiao, Chien-Chung Chen
  • Publication number: 20140136177
    Abstract: A critical path emulating apparatus includes a critical path emulator (CPE) and an interconnection circuit. The CPE is capable of emulating a critical path of a target device, and supporting a plurality of speed information detection modes. The interconnection circuit is capable of supporting a plurality of interconnection arrangements, wherein when the interconnection circuit is configured to have a first interconnection arrangement, the CPE is capable of being used in a first speed information detection mode, and when the interconnection circuit is configured to have a second interconnection arrangement, the CPE is capable of being used in a second speed information detection mode.
    Type: Application
    Filed: November 9, 2012
    Publication date: May 15, 2014
    Applicant: MEDIATEK INC.
    Inventors: Ming-Hsien Lee, Shih-Tsung Hsiao, Hsin-Chen Chen
  • Publication number: 20060276922
    Abstract: A system of process control. A measurement database stores work-in-process (WIP) measurement data. A monitor database stores tool monitor data. A design of experiment (DOE) database stores DOE data determined by a method of design of experiment, comprising tool operation data and WIP measurement data. A processor determines a compensation value according to preset process target data and the WIP measurement data, and determines tool adjustment data according to the compensation value, the tool monitor data, and the formula pertaining to processing factors.
    Type: Application
    Filed: April 13, 2006
    Publication date: December 7, 2006
    Inventors: Chia-Cheng Hsu, Chien-Chung Chen, Ming-Chang Lin, Shih-Tsung Hsiao