Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.

Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.

Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

Abstract: A backlight module includes a light source, a first prism sheet disposed on the light source, and a light type adjustment sheet disposed on a side of the first prism sheet away from the light source and including a base and multiple light type adjustment structures. The multiple light type adjustment structures are disposed on the first surface of the base. Each light type adjustment structure has a first structure surface and a second structure surface connected to each other. The first structure surface of each light type adjustment structure and the first surface of the base form a first base angle therebetween, and the second structure surface of each light type adjustment structure and the first surface of the base form a second base angle therebetween. The angle of the first base angle is different from the angle of the second base angle.

Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.

Abstract: A measurement system includes a camera and a processor. The camera is configured to capture a measurement card image of a measurement card, and the measurement card image includes a number of feature pattern images. The processor is electrically connected to the camera and configured for analyzing the feature pattern images to obtain a feature point coordinate of a feature point of each feature pattern image, and inputting the feature point coordinates into a conversion matrix to obtain a tip coordinate of a tip of the measurement card.

Abstract: A radio device includes a first antenna array and an actuator. The first antenna array is configured to transmit a radiation beam to a remote device. The actuator is configured to change an orientation of the first antenna array, whereby a beam direction of the radiation beam is changed according to a change of the orientation of the first antenna array. The beam direction of the radiation beam is adjusted according to a beam steering mechanism performed by the first antenna array.

Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: In an embodiment, a method of forming a structure includes forming a first transistor and a second transistor over a first substrate; forming a front-side interconnect structure over the first transistor and the second transistor; etching at least a backside of the first substrate to expose the first transistor and the second transistor; forming a first backside via electrically connected to the first transistor; forming a second backside via electrically connected to the second transistor; depositing a dielectric layer over the first backside via and the second backside via; forming a first conductive line in the dielectric layer, the first conductive line being a power rail electrically connected to the first transistor through the first backside via; and forming a second conductive line in the dielectric layer, the second conductive line being a signal line electrically connected to the second transistor through the second backside via.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: According to one embodiment, there is provided a computing device and method for evaluating driving risk. The computing device includes an input circuit and a processor. The input circuit is configured to receive data from a vehicle. The data includes at least one of GPS data, acceleration data or image data of views external of the vehicle or inside the cabin. Thereafter, the processor is configured to identify a plurality of risks based on the data received from the vehicle, determine a plurality of weightages which are assigned to the plurality of risks, and generate a score based on the plurality of weightages for the plurality of risks.

Abstract: An installing module includes a seat bracket, a plurality of lower gaskets, a device bracket and an upper gasket. The seat bracket includes a first locking plate and a second locking plate locked to each other. The first locking plate includes a first concave and the second locking plate includes a second concave corresponding to the first concave. The lower gaskets are respectively disposed on the first concave and the second concave. The lower gaskets face each other and jointly define a lower assembly hole and are disposed on a lower side of a head-support fixer of a car seat. The device bracket is locked to the seat bracket and an electronic device is pivotally coupled to the device bracket. The upper gasket is disposed between the device bracket and the head-support fixer, and the head-support fixer is clamped between the upper gasket and the lower gaskets.

Abstract: An electrical connector assembly includes: a bracket; and at least one transmission assembly mounted to the bracket and including an internal printed circuit board (PCB), a board-mount connector connected to a first row of conductive pads disposed at a bottom end portion of the PCB, and a plug-in connector connected to a second row of conductive pads disposed at a front end portion of the PCB, wherein the PCB has a third row of conductive pads disposed at a rear end portion thereof.

Abstract: A system package module is provided. The system package module includes a module substrate, a plurality of first pins and a plurality of second pins. The module substrate includes a module substrate surface. The module substrate surface includes a first pin arrangement area and a second pin arrangement area. The second pin arrangement area surrounds the first pin arrangement area. The first pins are disposed in the first pin arrangement area. A first pin gap is formed between the two adjacent first pins. The second pins are disposed in the second pin arrangement area. A second pin gap is formed between the two adjacent second pins. The first pin gap is greater than the second pin gap.

Abstract: An electronic device may be provided with a display. An optical component window may be formed in the inactive area of the display. The optical component window may transmit infrared light from an infrared light source. The infrared light source may include a diffuser to allow the light source to operate in a flood illumination mode and a structured light mode. The diffuser may include liquid crystal material between first and second substrates. A sealant may surround the liquid crystal layer, and one or more spacer walls may be located between the sealant and the liquid crystal layer. An additional spacer wall may be used outside of the sealant to prevent metal from creating an electrical short between electrodes in the diffuser. Conductive material in the sealant may be used to couple a top electrode to a metal pad on a bottom substrate.

Abstract: Disclosed herein is a method comprising disposing upon a substrate a composition comprising a block copolymer; where the block copolymer comprises a first polymer and a second polymer; where the first polymer and the second polymer of the block copolymer are different from each other and the block copolymer forms a phase separated structure; an additive polymer; where the additive polymer comprises a reactive moiety that is operative to react with a substrate upon which it is disposed; and where the additive polymer comprises a homopolymer that is the chemically and structurally the same as one of the polymers in the block copolymer or where the additive polymer comprises a random copolymer that has a preferential interaction with one of the blocks of the block copolymers; and a solvent; and annealing the composition.

Abstract: A system package module is provided. The system package module includes a module substrate, a plurality of first pins and a plurality of second pins. The module substrate includes a module substrate surface. The module substrate surface includes a first pin arrangement area and a second pin arrangement area. The second pin arrangement area surrounds the first pin arrangement area. The first pins are disposed in the first pin arrangement area. A first pin gap is formed between the two adjacent first pins. The second pins are disposed in the second pin arrangement area. A second pin gap is formed between the two adjacent second pins. The first pin gap is greater than the second pin gap.

Abstract: A window may be provided with a light modulator. The light modulator may be dynamically adjusted to control visible light transmission through the window. The window may also have layers that selectively block light with non-visible wavelengths. The light-blocking layers may block ultraviolet light, near infrared light such as light from solar radiation, and far infrared light such as heat produced due to the absorption of visible light by the light modulator. The light modulator may be a guest-host liquid crystal light modulator. The guest-host liquid crystal light modulator may have a layer of liquid crystal material with dye that is interposed between polymer substrate layers. The polymer substrate layers may be thermoplastic layers that are moldable to conform to window shapes with compound curves.

Abstract: A display may have display layers such as liquid crystal display layers having a liquid crystal layer interposed between a color filter layer and a thin-film transistor layer or organic light-emitting diode layers having organic light-emitting diodes formed from thin-film transistor circuitry. The display layers may be configured to form an array of pixels that display images and may include a polarizer. An angle-of-view adjustment layer may overlap the display layers. The angle-of-view adjustment layer may include one or more liquid crystal layers. A first polarizer may be interposed between first and second liquid crystal layers and the second liquid crystal layer may be overlapped by a second polarizer. The first and second polarizers may have pass axes that are aligned with a pass axis of the polarizer in the display layers. One or more liquid crystal layers in the angle-of-view adjustment layer may include dichroic dye.

Abstract: An electronic device may have a display. Input-output circuitry in the electronic device may be used to gather input from a viewer of the display. The input-output circuitry may include a gaze tracking system that gathers point-of-gaze information, vergence information, and head position information, may be a biometric sensor, may be an input device such as a button or touch sensor, may capture hand gestures, and/or may gather other information. The display may include a pixel array for producing images. An adjustable reflectance and transmittance layer may overlap the pixel array. Control circuitry in the electronic device may individually adjust different areas of the adjustable reflectance and transmittance layer. The control circuitry may place each area in a reflective mirror more or in a content-displaying mode and may move the areas in response to the information.