Patents by Inventor Shih-Wei Yang

Shih-Wei Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250051067
    Abstract: A cover device is provided and includes a first body, a second body, a resilient component, a seat assembly, a check valve and a filtering component. The second body is removably attached on the first body and resiliently deformable. The resilient component is disposed on the first body. The seat assembly is movable relative to the first body. The seat assembly includes a first seat and a second seat. The first seat is removably engaged with the resilient component and configured to be connected to a vacuum device. The second seat is removably engaged with the first seat. The check valve is disposed on the second seat. The filtering component is disposed between the second seat and the second body.
    Type: Application
    Filed: August 9, 2023
    Publication date: February 13, 2025
    Applicant: Universal Trim Supply Co., Ltd.
    Inventors: Shih-Sheng Yang, Chih-Wei Yang
  • Patent number: 12219747
    Abstract: SRAM designs based on GAA transistors are disclosed that provide flexibility for increasing channel widths of transistors at scaled IC technology nodes and relax limits on SRAM performance optimization imposed by FinFET-based SRAMs. GAA-based SRAM cells described have active region layouts with active regions shared by pull-down GAA transistors and pass-gate GAA transistors. A width of shared active regions that correspond with the pull-down GAA transistors are enlarged with respect to widths of the shared active regions that correspond with the pass-gate GAA transistors. A ratio of the widths is tuned to obtain ratios of pull-down transistor effective channel width to pass-gate effective channel width greater than 1, increase an on-current of pull-down GAA transistors relative to an on-current of pass-gate GAA transistors, decrease a threshold voltage of pull-down GAA transistors relative to a threshold voltage of pass-gate GAA transistors, and/or increases a ? ratio of an SRAM cell.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Chih-Hsuan Chen, Kian-Long Lim, Chao-Yuan Chang, Feng-Ming Chang, Lien Jung Hung, Ping-Wei Wang
  • Patent number: 12204163
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: February 5, 2024
    Date of Patent: January 21, 2025
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 12119427
    Abstract: The light emitting device includes a growth substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the growth substrate from top to bottom. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: October 15, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang, Tsai-Chen Sung
  • Patent number: 12113152
    Abstract: The light emitting device includes a substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the substrate from bottom to top. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Grant
    Filed: May 2, 2021
    Date of Patent: October 8, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang, Tsai-Chen Sung
  • Patent number: 11811001
    Abstract: The forming method of a flip-chip light emitting diode structure includes the following steps. A first substrate including a first semiconductor layer, an active layer on the first semiconductor layer and a second semiconductor layer on the active layer is provided. A first current blocking layer is formed on the second semiconductor layer, in which the first current blocking layer has a plurality of interspaces. A reflective layer covering the interspaces is formed, in which the reflective layer has a plurality of recesses, and each of the recesses is corresponding to each of the interspaces. A second current blocking layer filling into the recesses is formed.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: November 7, 2023
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang
  • Publication number: 20230335680
    Abstract: The light emitting device includes a growth substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the growth substrate from top to bottom. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 19, 2023
    Inventors: Jih-Kang CHEN, Shih-Wei YANG, Tsai-Chen SUNG
  • Patent number: 11755094
    Abstract: A system for controlling an information handling system is disclosed that includes a central processing unit, a memory device, a power supply and a memory speed controller configured to determine one or more system parameters of the central processing unit, the memory device and the power supply, to store a boot setting as a function of the one or more system parameters and to cause a system reboot after storing the boot setting.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: September 12, 2023
    Assignee: DELL PRODUCTS L.P.
    Inventors: Chunge-Wei Wang, Chihchung Lin, Tse-An- Chu, Shih-Wei Yang, Yi Ling Tsai
  • Patent number: 11625075
    Abstract: An electronic device includes a first body, a pivot assembly and a second body. The first body includes a first side and a second side, and the second side includes a groove. The pivot assembly includes a container, a first gear, a second gear and a third gear. The container includes an accommodating space and a side wall. The first gear is disposed in the accommodating space and connected to the groove. The second gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the first gear. The third gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the second gear. The second body is pivotally disposed at the container and connected to the third gear.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: April 11, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chin-Chung Lai, Yung-Hsiang Chen, Shih-Wei Yang
  • Publication number: 20230078065
    Abstract: The forming method of a flip-chip light emitting diode structure includes the following steps. A first substrate including a first semiconductor layer, an active layer on the first semiconductor layer and a second semiconductor layer on the active layer is provided. A first current blocking layer is formed on the second semiconductor layer, in which the first current blocking layer has a plurality of interspaces. A reflective layer covering the interspaces is formed, in which the reflective layer has a plurality of recesses, and each of the recesses is corresponding to each of the interspaces. A second current blocking layer filling into the recesses is formed.
    Type: Application
    Filed: October 31, 2022
    Publication date: March 16, 2023
    Inventors: Jih-Kang CHEN, Shih-Wei YANG
  • Patent number: 11592912
    Abstract: Clickpad structures may be attached to surfaces of an information handling system using material stacks comprising an elastic material, such as a sponge, which can preload a force on the clickpad surface. The preloaded force reduces a gap between the clickpad switch and contact point, which reduces instability, rattling, and other negative experiences with the clickpad surface experienced by a user. According to an embodiment, an input device for an information handling system includes a clickpad surface having a first side configured to receive user input and a second side opposite the first side; a first coupling stack comprising a first elastic material with a first thickness; and a second coupling stack comprising a second elastic material with a second thickness, wherein each of the coupling stacks is attached to the clickpad surface and a surface of the information handling system by adhesives.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: February 28, 2023
    Assignee: Dell Products L.P.
    Inventors: Jing-Tang Wu, Shih-Wei Yang, Chia-Chi Ho, Ya-Chen Tsai
  • Patent number: 11515447
    Abstract: The flip-chip light emitting diode structure includes a substrate, a first patterned current blocking layer, a second patterned current blocking layer, a first semiconductor layer, an active layer and a second semiconductor layer. The first patterned current blocking layer is disposed on the substrate. The second patterned current blocking layer is disposed on the first patterned current blocking layer, in which the first patterned current blocking layer and the second patterned current blocking layer are located on different planes, and patterns of the first patterned current blocking layer and patterns of the second current blocking layer are substantially complementary. The first semiconductor layer is disposed on the second patterned current blocking layer. The active layer is disposed on the first semiconductor layer. The second semiconductor layer is disposed on the active layer, in which electrical properties of the second semiconductor layer and the first semiconductor layer are different.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: November 29, 2022
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang
  • Publication number: 20220253123
    Abstract: A system for controlling an information handling system is disclosed that includes a central processing unit, a memory device, a power supply and a memory speed controller configured to determine one or more system parameters of the central processing unit, the memory device and the power supply, to store a boot setting as a function of the one or more system parameters and to cause a system reboot after storing the boot setting.
    Type: Application
    Filed: April 28, 2022
    Publication date: August 11, 2022
    Applicant: DELL PRODUCTS L.P.
    Inventors: Chunge-Wei Wang, Chihchung Lin, Tse-An- Chu, Shih-Wei Yang, Yi Ling Tsai
  • Patent number: 11320885
    Abstract: A system for controlling an information handling system is disclosed that includes a central processing unit, a memory device, a power supply and a memory speed controller configured to determine one or more system parameters of the central processing unit, the memory device and the power supply, to store a boot setting as a function of the one or more system parameters and to cause a system reboot after storing the boot setting.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: May 3, 2022
    Assignee: DELL PRODUCTS L.P.
    Inventors: Chunge-Wei Wang, Chihchung Lin, Tse-An- Chu, Shih-Wei Yang, Yi Ling Tsai
  • Publication number: 20220121247
    Abstract: An electronic device includes a first body, a pivot assembly and a second body. The first body includes a first side and a second side, and the second side includes a groove. The pivot assembly includes a container, a first gear, a second gear and a third gear. The container includes an accommodating space and a side wall. The first gear is disposed in the accommodating space and connected to the groove. The second gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the first gear. The third gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the second gear. The second body is pivotally disposed at the container and connected to the third gear.
    Type: Application
    Filed: October 14, 2021
    Publication date: April 21, 2022
    Inventors: Chin-Chung Lai, Yung-Hsiang Chen, Shih-Wei Yang
  • Publication number: 20220013692
    Abstract: The light emitting device includes a substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the substrate from bottom to top. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Application
    Filed: May 2, 2021
    Publication date: January 13, 2022
    Inventors: Jih-Kang CHEN, Shih-Wei YANG, Tsai-Chen SUNG
  • Publication number: 20210373642
    Abstract: A system for controlling an information handling system is disclosed that includes a central processing unit, a memory device, a power supply and a memory speed controller configured to determine one or more system parameters of the central processing unit, the memory device and the power supply, to store a boot setting as a function of the one or more system parameters and to cause a system reboot after storing the boot setting.
    Type: Application
    Filed: May 26, 2020
    Publication date: December 2, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Chunge-Wei Wang, Chihchung Lin, Tse-An- Chu, Shih-Wei Yang, Yi Ling Tsai
  • Publication number: 20210288213
    Abstract: The flip-chip light emitting diode structure includes a substrate, a first patterned current blocking layer, a second patterned current blocking layer, a first semiconductor layer, an active layer and a second semiconductor layer. The first patterned current blocking layer is disposed on the substrate. The second patterned current blocking layer is disposed on the first patterned current blocking layer, in which the first patterned current blocking layer and the second patterned current blocking layer are located on different planes, and patterns of the first patterned current blocking layer and patterns of the second current blocking layer are substantially complementary. The first semiconductor layer is disposed on the second patterned current blocking layer. The active layer is disposed on the first semiconductor layer. The second semiconductor layer is disposed on the active layer, in which electrical properties of the second semiconductor layer and the first semiconductor layer are different.
    Type: Application
    Filed: September 21, 2020
    Publication date: September 16, 2021
    Inventors: Jih-Kang CHEN, Shih-Wei YANG
  • Patent number: 9990739
    Abstract: A method and device for fisheye camera automatic calibration is disclosed. A first straight line and a second straight line are respectively moved to generate a first fisheye line and a second fisheye line being straight lines. At least two symmetric points are generated on the second straight line based on an intersection of the first straight line and the second straight line as a symmetric central point, so as to correspondingly generate at least two fisheye symmetric points. The second straight line rotates until a distance between the first fisheye line and each of two fisheye symmetric points is equal. Then, central intersection coordinates, fisheye symmetric coordinates, a fisheye symmetric distance are retrieved and used to calculate fisheye parameters.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: June 5, 2018
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Jen-Hui Chuang, Tien-Lung Chang, Mu-Tien Lu, Yi-Yu Hsieh, Shih-Wei Yang
  • Patent number: 9274638
    Abstract: A touch panel includes a substrate, a light-shielding layer, a patterned transparent layer, a reflecting layer, at least one first sensing series, and at least one second sensing series. The substrate has a touch sensing region and a peripheral region. The light-shielding layer is disposed in the periphery region. The light-shielding layer has a patterned opening and a sidewall adjacent to the patterned opening. The patterned opening is configured to provide a mark identifiable by human eyes. The patterned transparent layer is disposed in the peripheral region, and the patterned transparent layer covers a portion of the patterned opening. The patterned transparent layer has an inclined sidewall positioned in the patterned opening. The reflecting layer covers the inclined sidewall and the patterned opening. The first sensing series and the second sensing series are arranged in the touch sensing region to detect a position of a touch point.
    Type: Grant
    Filed: May 7, 2014
    Date of Patent: March 1, 2016
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Shih-Wei Yang, An-Cheng Chen, Shih-Po Chou