Patents by Inventor Shih-Wei Yang

Shih-Wei Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250224343
    Abstract: There is provided a system and method of examination of a semiconductor specimen. The method includes obtaining a group of defect candidates associated with respective inspection locations represented in an inspection coordinate system; using a trained machine learning (ML) model to provide, for each defect candidate, a probability of the defect candidate being a defect of interest (DOI), and ranking the group of defect candidates to an ordered list according to respective probabilities thereof, in response to a part of the ordered list of defect candidates being reviewed by a review tool in accordance with an order thereof, receiving a predefined number of DOIs associated with respective review locations represented in a review coordinate system; and calculating an offset between the review coordinate system and the inspection coordinate system based on respective inspection and review locations associated with the predefined number of DOIs.
    Type: Application
    Filed: January 8, 2024
    Publication date: July 10, 2025
    Inventors: Albert KAO, Shih-Wei YANG, Chun-Hsiang YEN, Boaz COHEN, Yen Cheng CHIANG, Ching-Hung LAI, Chenwei HUANG
  • Publication number: 20250072192
    Abstract: A semiconductor device is provided, which includes a semiconductor epitaxial structure, a first insulating layer, a metal layer, a second insulating layer, a first electrode pad, a second electrode pad, and an intermediate structure. The semiconductor epitaxial structure includes an active region and has a first sidewall and a first upper surface. The first insulating layer covers the first sidewall and the first upper surface of the semiconductor epitaxial structure and has a second upper surface. The metal layer is located on the first insulating layer. The second insulating layer is located on the metal layer. The first electrode pad and the second electrode pad are located on the second insulating layer. The intermediate structure is located between the first insulating layer and the metal layer. The second upper surface of the first insulating layer has a portion directly contacts the metal layer.
    Type: Application
    Filed: August 20, 2024
    Publication date: February 27, 2025
    Inventors: Jih-Kang CHEN, Hsien-Pen WU, Shih-Wei YANG
  • Patent number: 12119427
    Abstract: The light emitting device includes a growth substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the growth substrate from top to bottom. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: October 15, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang, Tsai-Chen Sung
  • Patent number: 12113152
    Abstract: The light emitting device includes a substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the substrate from bottom to top. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Grant
    Filed: May 2, 2021
    Date of Patent: October 8, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang, Tsai-Chen Sung
  • Patent number: 11811001
    Abstract: The forming method of a flip-chip light emitting diode structure includes the following steps. A first substrate including a first semiconductor layer, an active layer on the first semiconductor layer and a second semiconductor layer on the active layer is provided. A first current blocking layer is formed on the second semiconductor layer, in which the first current blocking layer has a plurality of interspaces. A reflective layer covering the interspaces is formed, in which the reflective layer has a plurality of recesses, and each of the recesses is corresponding to each of the interspaces. A second current blocking layer filling into the recesses is formed.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: November 7, 2023
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang
  • Publication number: 20230335680
    Abstract: The light emitting device includes a growth substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the growth substrate from top to bottom. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 19, 2023
    Inventors: Jih-Kang CHEN, Shih-Wei YANG, Tsai-Chen SUNG
  • Patent number: 11755094
    Abstract: A system for controlling an information handling system is disclosed that includes a central processing unit, a memory device, a power supply and a memory speed controller configured to determine one or more system parameters of the central processing unit, the memory device and the power supply, to store a boot setting as a function of the one or more system parameters and to cause a system reboot after storing the boot setting.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: September 12, 2023
    Assignee: DELL PRODUCTS L.P.
    Inventors: Chunge-Wei Wang, Chihchung Lin, Tse-An- Chu, Shih-Wei Yang, Yi Ling Tsai
  • Patent number: 11625075
    Abstract: An electronic device includes a first body, a pivot assembly and a second body. The first body includes a first side and a second side, and the second side includes a groove. The pivot assembly includes a container, a first gear, a second gear and a third gear. The container includes an accommodating space and a side wall. The first gear is disposed in the accommodating space and connected to the groove. The second gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the first gear. The third gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the second gear. The second body is pivotally disposed at the container and connected to the third gear.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: April 11, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chin-Chung Lai, Yung-Hsiang Chen, Shih-Wei Yang
  • Publication number: 20230078065
    Abstract: The forming method of a flip-chip light emitting diode structure includes the following steps. A first substrate including a first semiconductor layer, an active layer on the first semiconductor layer and a second semiconductor layer on the active layer is provided. A first current blocking layer is formed on the second semiconductor layer, in which the first current blocking layer has a plurality of interspaces. A reflective layer covering the interspaces is formed, in which the reflective layer has a plurality of recesses, and each of the recesses is corresponding to each of the interspaces. A second current blocking layer filling into the recesses is formed.
    Type: Application
    Filed: October 31, 2022
    Publication date: March 16, 2023
    Inventors: Jih-Kang CHEN, Shih-Wei YANG
  • Patent number: 11592912
    Abstract: Clickpad structures may be attached to surfaces of an information handling system using material stacks comprising an elastic material, such as a sponge, which can preload a force on the clickpad surface. The preloaded force reduces a gap between the clickpad switch and contact point, which reduces instability, rattling, and other negative experiences with the clickpad surface experienced by a user. According to an embodiment, an input device for an information handling system includes a clickpad surface having a first side configured to receive user input and a second side opposite the first side; a first coupling stack comprising a first elastic material with a first thickness; and a second coupling stack comprising a second elastic material with a second thickness, wherein each of the coupling stacks is attached to the clickpad surface and a surface of the information handling system by adhesives.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: February 28, 2023
    Assignee: Dell Products L.P.
    Inventors: Jing-Tang Wu, Shih-Wei Yang, Chia-Chi Ho, Ya-Chen Tsai
  • Patent number: 11515447
    Abstract: The flip-chip light emitting diode structure includes a substrate, a first patterned current blocking layer, a second patterned current blocking layer, a first semiconductor layer, an active layer and a second semiconductor layer. The first patterned current blocking layer is disposed on the substrate. The second patterned current blocking layer is disposed on the first patterned current blocking layer, in which the first patterned current blocking layer and the second patterned current blocking layer are located on different planes, and patterns of the first patterned current blocking layer and patterns of the second current blocking layer are substantially complementary. The first semiconductor layer is disposed on the second patterned current blocking layer. The active layer is disposed on the first semiconductor layer. The second semiconductor layer is disposed on the active layer, in which electrical properties of the second semiconductor layer and the first semiconductor layer are different.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: November 29, 2022
    Assignee: Lextar Electronics Corporation
    Inventors: Jih-Kang Chen, Shih-Wei Yang
  • Publication number: 20220253123
    Abstract: A system for controlling an information handling system is disclosed that includes a central processing unit, a memory device, a power supply and a memory speed controller configured to determine one or more system parameters of the central processing unit, the memory device and the power supply, to store a boot setting as a function of the one or more system parameters and to cause a system reboot after storing the boot setting.
    Type: Application
    Filed: April 28, 2022
    Publication date: August 11, 2022
    Applicant: DELL PRODUCTS L.P.
    Inventors: Chunge-Wei Wang, Chihchung Lin, Tse-An- Chu, Shih-Wei Yang, Yi Ling Tsai
  • Patent number: 11320885
    Abstract: A system for controlling an information handling system is disclosed that includes a central processing unit, a memory device, a power supply and a memory speed controller configured to determine one or more system parameters of the central processing unit, the memory device and the power supply, to store a boot setting as a function of the one or more system parameters and to cause a system reboot after storing the boot setting.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: May 3, 2022
    Assignee: DELL PRODUCTS L.P.
    Inventors: Chunge-Wei Wang, Chihchung Lin, Tse-An- Chu, Shih-Wei Yang, Yi Ling Tsai
  • Publication number: 20220121247
    Abstract: An electronic device includes a first body, a pivot assembly and a second body. The first body includes a first side and a second side, and the second side includes a groove. The pivot assembly includes a container, a first gear, a second gear and a third gear. The container includes an accommodating space and a side wall. The first gear is disposed in the accommodating space and connected to the groove. The second gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the first gear. The third gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the second gear. The second body is pivotally disposed at the container and connected to the third gear.
    Type: Application
    Filed: October 14, 2021
    Publication date: April 21, 2022
    Inventors: Chin-Chung Lai, Yung-Hsiang Chen, Shih-Wei Yang
  • Publication number: 20220013692
    Abstract: The light emitting device includes a substrate, a light-emitting semiconductor structure, conductive pillars, an insulating layer, and first and second electrodes. The light-emitting semiconductor structure includes a first-type semiconductor layer, a light-emitting layer and a second-type semiconductor layer disposed on the substrate from bottom to top. The conductive pillars are disposed in the light-emitting semiconductor structure. The conductive pillars penetrates is in contact with the second-type semiconductor layer and electrically connected to the substrate. A first portion of the insulating layer is disposed between the first-type semiconductor layer and the substrate, and a second portion of the insulating layer electrically insulates the first-type semiconductor layer and the light emitting-layer from the conductive pillars. The first electrode is electrically connected to the first-type semiconductor layer and electrically insulated from the conductive pillars.
    Type: Application
    Filed: May 2, 2021
    Publication date: January 13, 2022
    Inventors: Jih-Kang CHEN, Shih-Wei YANG, Tsai-Chen SUNG
  • Publication number: 20210373642
    Abstract: A system for controlling an information handling system is disclosed that includes a central processing unit, a memory device, a power supply and a memory speed controller configured to determine one or more system parameters of the central processing unit, the memory device and the power supply, to store a boot setting as a function of the one or more system parameters and to cause a system reboot after storing the boot setting.
    Type: Application
    Filed: May 26, 2020
    Publication date: December 2, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Chunge-Wei Wang, Chihchung Lin, Tse-An- Chu, Shih-Wei Yang, Yi Ling Tsai
  • Publication number: 20210288213
    Abstract: The flip-chip light emitting diode structure includes a substrate, a first patterned current blocking layer, a second patterned current blocking layer, a first semiconductor layer, an active layer and a second semiconductor layer. The first patterned current blocking layer is disposed on the substrate. The second patterned current blocking layer is disposed on the first patterned current blocking layer, in which the first patterned current blocking layer and the second patterned current blocking layer are located on different planes, and patterns of the first patterned current blocking layer and patterns of the second current blocking layer are substantially complementary. The first semiconductor layer is disposed on the second patterned current blocking layer. The active layer is disposed on the first semiconductor layer. The second semiconductor layer is disposed on the active layer, in which electrical properties of the second semiconductor layer and the first semiconductor layer are different.
    Type: Application
    Filed: September 21, 2020
    Publication date: September 16, 2021
    Inventors: Jih-Kang CHEN, Shih-Wei YANG
  • Patent number: 9990739
    Abstract: A method and device for fisheye camera automatic calibration is disclosed. A first straight line and a second straight line are respectively moved to generate a first fisheye line and a second fisheye line being straight lines. At least two symmetric points are generated on the second straight line based on an intersection of the first straight line and the second straight line as a symmetric central point, so as to correspondingly generate at least two fisheye symmetric points. The second straight line rotates until a distance between the first fisheye line and each of two fisheye symmetric points is equal. Then, central intersection coordinates, fisheye symmetric coordinates, a fisheye symmetric distance are retrieved and used to calculate fisheye parameters.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: June 5, 2018
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Jen-Hui Chuang, Tien-Lung Chang, Mu-Tien Lu, Yi-Yu Hsieh, Shih-Wei Yang
  • Patent number: 9274638
    Abstract: A touch panel includes a substrate, a light-shielding layer, a patterned transparent layer, a reflecting layer, at least one first sensing series, and at least one second sensing series. The substrate has a touch sensing region and a peripheral region. The light-shielding layer is disposed in the periphery region. The light-shielding layer has a patterned opening and a sidewall adjacent to the patterned opening. The patterned opening is configured to provide a mark identifiable by human eyes. The patterned transparent layer is disposed in the peripheral region, and the patterned transparent layer covers a portion of the patterned opening. The patterned transparent layer has an inclined sidewall positioned in the patterned opening. The reflecting layer covers the inclined sidewall and the patterned opening. The first sensing series and the second sensing series are arranged in the touch sensing region to detect a position of a touch point.
    Type: Grant
    Filed: May 7, 2014
    Date of Patent: March 1, 2016
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Shih-Wei Yang, An-Cheng Chen, Shih-Po Chou
  • Patent number: 8987624
    Abstract: An information handling system can include a base, a printed circuit board including a capacitive switch, and a cover. The printed circuit board can be attached to the base, and the cover can lie adjacent to the printed circuit board. The capacitive switch can be configured to change state when an object is close to the cover. The cover can be configured such that it can be detached from the remainder of the information handling system while the printed circuit board remains attached to the base. The configuration of the printed circuit board and cover can be particularly useful when maintaining a keyboard or a touch pad or when replacing the cover.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: March 24, 2015
    Assignee: Dell Products, LP
    Inventors: Gurmeet Singh Bhutani, Shih-Wei Yang, Kuo-Hsiang Huang