Patents by Inventor SHIH YA HUANG

SHIH YA HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210057346
    Abstract: A semiconductor package includes dies, a redistribution structure, a conductive structure and connectors. The conductive plate is electrically connected to contact pads of at least two dies and is disposed on redistribution structure. The conductive structure includes a conductive plate and a solder cover, and the conductive structure extend over the at least two dies. The connectors are disposed on the redistribution structure, and at least one connector includes a conductive pillar. The conductive plate is at same level height as conductive pillar. The vertical projection of the conductive plate falls on spans of the at least two dies.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 25, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang, Wei-Ting Chen, Chien-Hsun Chen, Shih-Ya Huang
  • Publication number: 20210013191
    Abstract: Provided are a package structure and a method of manufacturing the same. The package structure includes a die, a first passive device, a plurality of through insulator vias (TIVs), an encapsulant, and a plurality of conductive connectors. The die has a front side and a backside opposite to each other. The first passive device is disposed aside the die. The TIVs are disposed between the die and the first passive device. The encapsulant laterally encapsulates the TIVs, the first passive device, and the die. The conductive connectors are disposed on the backside of the die, wherein the conductive connectors are electrically connected to the die and the first passive device by a plurality of solders.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 14, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Ya Huang, Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang
  • Patent number: 10811404
    Abstract: Provided are a package structure and a method of manufacturing the same. The package structure includes a die, a passive device, and a package. The die has a front side and a backside opposite to each other. The package is disposed on the backside of the die. The passive device is disposed between the backside of the die and the package.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: October 20, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Ya Huang, Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang
  • Publication number: 20200321288
    Abstract: A method includes embedding a die in a molding material; forming a first dielectric layer over the molding material and the die; forming a conductive line over an upper surface of the first dielectric layer facing away from the die; and forming a second dielectric layer over the first dielectric layer and the conductive line. The method further includes forming a first trench opening extending through the first dielectric layer or the second dielectric layer, where a longitudinal axis of the first trench is parallel with a longitudinal axis of the conductive line, and where no electrically conductive feature is exposed at a bottom of the first trench opening; and filling the first trench opening with an electrically conductive material to form a first ground trench.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Shih-Ya Huang, Chung-Hao Tsai, Chuei-Tang Wang, Chen-Hua Yu, Chih-Yuan Chang
  • Patent number: 10692817
    Abstract: A method includes embedding a die in a molding material; forming a first dielectric layer over the molding material and the die; forming a conductive line over an upper surface of the first dielectric layer facing away from the die; and forming a second dielectric layer over the first dielectric layer and the conductive line. The method further includes forming a first trench opening extending through the first dielectric layer or the second dielectric layer, where a longitudinal axis of the first trench is parallel with a longitudinal axis of the conductive line, and where no electrically conductive feature is exposed at a bottom of the first trench opening; and filling the first trench opening with an electrically conductive material to form a first ground trench.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Ya Huang, Chung-Hao Tsai, Chuei-Tang Wang, Chen-Hua Yu, Chih-Yuan Chang
  • Publication number: 20190371781
    Abstract: Provided are a package structure and a method of manufacturing the same. The package structure includes a die, a passive device, and a package. The die has a front side and a backside opposite to each other. The package is disposed on the backside of the die. The passive device is disposed between the backside of the die and the package.
    Type: Application
    Filed: December 13, 2018
    Publication date: December 5, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Ya Huang, Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang
  • Publication number: 20190252326
    Abstract: A method includes embedding a die in a molding material; forming a first dielectric layer over the molding material and the die; forming a conductive line over an upper surface of the first dielectric layer facing away from the die; and forming a second dielectric layer over the first dielectric layer and the conductive line. The method further includes forming a first trench opening extending through the first dielectric layer or the second dielectric layer, where a longitudinal axis of the first trench is parallel with a longitudinal axis of the conductive line, and where no electrically conductive feature is exposed at a bottom of the first trench opening; and filling the first trench opening with an electrically conductive material to form a first ground trench.
    Type: Application
    Filed: April 18, 2019
    Publication date: August 15, 2019
    Inventors: Shih-Ya Huang, Chung-Hao Tsai, Chuei-Tang Wang, Chen-Hua Yu, Chih-Yuan Chang
  • Patent number: 10269728
    Abstract: A method includes embedding a die in a molding material; forming a first dielectric layer over the molding material and the die; forming a conductive line over an upper surface of the first dielectric layer facing away from the die; and forming a second dielectric layer over the first dielectric layer and the conductive line. The method further includes forming a first trench opening extending through the first dielectric layer or the second dielectric layer, where a longitudinal axis of the first trench is parallel with a longitudinal axis of the conductive line, and where no electrically conductive feature is exposed at a bottom of the first trench opening; and filling the first trench opening with an electrically conductive material to form a first ground trench.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Ya Huang, Chung-Hao Tsai, Chuei-Tang Wang, Chen-Hua Yu, Chih-Yuan Chang
  • Patent number: 10111329
    Abstract: A flexible flat cable structure capable of improving crosstalk interference includes plural telecommunication signal conductors separated from one another and provided for transmitting differential signals, two support members installed on two lateral sides of the telecommunication signal conductor respectively, at least one filled material disposed between the telecommunication signal conductors. The ratio of the equivalent dielectric constant of the filled material to the equivalent dielectric constant of the support members falls within a range of 0.39˜0.27, and the ratio of the thickness of the filled material to the thickness of the support members falls within a range of 1.49˜1.37.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: October 23, 2018
    Assignee: PORTWELL INC.
    Inventors: Ruey Beei Wu, Shih Ya Huang, Chia Tsung Liu, Shih Hsing Ku
  • Publication number: 20170243677
    Abstract: A flexible flat cable structure capable of improving crosstalk interference includes plural telecommunication signal conductors separated from one another and provided for transmitting differential signals, two support members installed on two lateral sides of the telecommunication signal conductor respectively, at least one filled material disposed between the telecommunication signal conductors. The ratio of the equivalent dielectric constant of the filled material to the equivalent dielectric constant of the support members falls within a range of 0.39˜0.27, and the ratio of the thickness of the filled material to the thickness of the support members falls within a range of 1.49˜1.37.
    Type: Application
    Filed: May 5, 2017
    Publication date: August 24, 2017
    Inventors: RUEY BEEI WU, SHIH YA HUANG, CHIA TSUNG LIU, SHIH HSING KU
  • Publication number: 20170179649
    Abstract: A flexible flat cable structure capable of improving crosstalk interference includes plural telecommunication signal conductors separated from one another and provided for transmitting differential signals, two support members installed on two lateral sides of the telecommunication signal conductor respectively, at least one filled material disposed between the telecommunication signal conductors. The ratio of the equivalent dielectric constant of the filled material to the equivalent dielectric constant of the support members falls within a range of 0.39˜0.27, and the ratio of the thickness of the filled material to the thickness of the support members falls within a range of 1.49˜1.37.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 22, 2017
    Inventors: RUEY BEEI WU, SHIH YA HUANG, CHIA TSUNG LIU, SHIH HSING KU