Patents by Inventor Shih-Ya Lin
Shih-Ya Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230369487Abstract: A semiconductor device includes a first layer that includes a first semiconductor material disposed on a semiconductor substrate, and a second layer of a second semiconductor material disposed on the first layer. The semiconductor substrate includes Si. The first semiconductor material and the second semiconductor material are different. The second semiconductor material is formed of an alloy including a first element and Sn. A surface region of an end portion of the second layer at both ends of the second layer has a higher concentration of Sn than an internal region of the end portion of the second layer. The surface region surrounds the internal region.Type: ApplicationFiled: July 25, 2023Publication date: November 16, 2023Inventors: Fang-Liang LU, I-Hsieh Wong, Shih-Ya Lin, CheeWee Liu, Samuel C. Pan
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Patent number: 11791410Abstract: A semiconductor device includes a first layer that includes a first semiconductor material disposed on a semiconductor substrate, and a second layer of a second semiconductor material disposed on the first layer. The semiconductor substrate includes Si. The first semiconductor material and the second semiconductor material are different. The second semiconductor material is formed of an alloy including a first element and Sn. A surface region of an end portion of the second layer at both ends of the second layer has a higher concentration of Sn than an internal region of the end portion of the second layer. The surface region surrounds the internal region.Type: GrantFiled: July 12, 2021Date of Patent: October 17, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Fang-Liang Lu, I-Hsieh Wong, Shih-Ya Lin, CheeWee Liu, Samuel C. Pan
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Publication number: 20230207634Abstract: The present disclosure describes a semiconductor device includes a substrate, a buffer layer on the substrate, and a stacked fin structure on the buffer layer. The buffer layer can include germanium, and the stacked fin structure can include a semiconductor layer with germanium and tin. The semiconductor device further includes a gate structure wrapped around a portion of the semiconductor layer and an epitaxial structure on the buffer layer and in contact with the semiconductor layer. The epitaxial structure includes germanium and tin.Type: ApplicationFiled: March 6, 2023Publication date: June 29, 2023Applicant: Taiwan Semiconductor Manufacturing co., Ltd.Inventors: Shahaji B. More, Cheng-Han Lee, Shih-Chieh Chang, Shih-Ya Lin, Chung-En Tsai, Chee-Wee Liu
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Publication number: 20230154923Abstract: A device comprises a gate structure, n-type source/drain features, p-type source/drain features, an NFET channel, and a PFET channel. The gate structure is over a substrate. The n-type source/drain features are on opposite first and second sides of the gate structure, respectively. The p-type source/drain features are on opposite third and fourth sides of the gate structure, respectively. The NFET channel extends within the gate structure and connects the n-type source/drain features. The PFET channel extends within the gate structure and connects the p-type source/drain features. The NFET channel and the PFET channel are vertically spaced apart by the gate structure.Type: ApplicationFiled: February 22, 2022Publication date: May 18, 2023Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITYInventors: Shih-Ya LIN, Chien-Te TU, Chung-En TSAI, Chee-Wee LIU
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Patent number: 11600703Abstract: The present disclosure describes a semiconductor device includes a substrate, a buffer layer on the substrate, and a stacked fin structure on the buffer layer. The buffer layer can include germanium, and the stacked fin structure can include a semiconductor layer with germanium and tin. The semiconductor device further includes a gate structure wrapped around a portion of the semiconductor layer and an epitaxial structure on the buffer layer and in contact with the semiconductor layer. The epitaxial structure includes germanium and tin.Type: GrantFiled: January 29, 2021Date of Patent: March 7, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shahaji B. More, Cheng-Han Lee, Shih-Chieh Chang, Shih-Ya Lin, Chung-En Tsai, Chee-Wee Liu
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Publication number: 20220246726Abstract: The present disclosure describes a semiconductor device includes a substrate, a buffer layer on the substrate, and a stacked fin structure on the buffer layer. The buffer layer can include germanium, and the stacked fin structure can include a semiconductor layer with germanium and tin. The semiconductor device further includes a gate structure wrapped around a portion of the semiconductor layer and an epitaxial structure on the buffer layer and in contact with the semiconductor layer. The epitaxial structure includes germanium and tin.Type: ApplicationFiled: January 29, 2021Publication date: August 4, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shahaji B. MORE, Cheng-Han Lee, Shih-Chieh Chang, Shih-Ya Lin, Chung-En Tsai, Chee-Wee Liu
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Publication number: 20210343866Abstract: A method of manufacturing a semiconductor device includes forming an alloy semiconductor material layer comprising a first element and a second element on a semiconductor substrate. A mask is formed on the alloy semiconductor material layer to provide a masked portion and an unmasked portion of the alloy semiconductor material layer. The unmasked portion of the alloy semiconductor material layer not covered by the mask is irradiated with radiation from a radiation source to transform the alloy semiconductor material layer so that a surface region of the unmasked portion of the alloy semiconductor material layer has a higher concentration of the second element than an internal region of the unmasked portion of the alloy semiconductor material layer. The surface region surrounds the internal region.Type: ApplicationFiled: July 12, 2021Publication date: November 4, 2021Inventors: Fang-Liang Lu, I-Hsieh Wong, Shih-Ya Lin, CheeWee Liu, Samuel C. Pan
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Patent number: 11063149Abstract: A semiconductor device includes a first layer of a first semiconductor material disposed on a semiconductor substrate and a second layer of a second semiconductor material disposed on the first layer. The second semiconductor material is formed of an alloy that includes a first element and a second element. The first semiconductor material and the second semiconductor material are different. A gate structure is disposed on a first portion of the second layer. A surface region of a second portion of the second layer not covered by the gate structure has a higher concentration of the second element than an internal region of the second portion of the second layer, and the surface region surrounds the internal region.Type: GrantFiled: November 18, 2019Date of Patent: July 13, 2021Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Fang-Liang Lu, I-Hsieh Wong, Shih-Ya Lin, Cheewee Liu, Samuel C. Pan
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Publication number: 20200098917Abstract: A method of manufacturing a semiconductor device includes forming an alloy semiconductor material layer comprising a first element and a second element on a semiconductor substrate. A mask is formed on the alloy semiconductor material layer to provide a masked portion and an unmasked portion of the alloy semiconductor material layer. The unmasked portion of the alloy semiconductor material layer not covered by the mask is irradiated with radiation from a radiation source to transform the alloy semiconductor material layer so that a surface region of the unmasked portion of the alloy semiconductor material layer has a higher concentration of the second element than an internal region of the unmasked portion of the alloy semiconductor material layer. The surface region surrounds the internal region.Type: ApplicationFiled: November 18, 2019Publication date: March 26, 2020Inventors: Fang-Liang LU, I-Hsieh WONG, Shih-Ya LIN, Cheewee LIU, Samuel C. PAN
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Patent number: 10510888Abstract: A method of manufacturing a semiconductor device includes forming an alloy semiconductor material layer comprising a first element and a second element on a semiconductor substrate. A mask is formed on the alloy semiconductor material layer to provide a masked portion and an unmasked portion of the alloy semiconductor material layer. The unmasked portion of the alloy semiconductor material layer not covered by the mask is irradiated with radiation from a radiation source to transform the alloy semiconductor material layer so that a surface region of the unmasked portion of the alloy semiconductor material layer has a higher concentration of the second element than an internal region of the unmasked portion of the alloy semiconductor material layer. The surface region surrounds the internal region.Type: GrantFiled: July 7, 2017Date of Patent: December 17, 2019Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Fang-Liang Lu, I-Hsieh Wong, Shih-Ya Lin, CheeWee Liu, Samuel C. Pan
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Publication number: 20180151734Abstract: A method of manufacturing a semiconductor device includes forming an alloy semiconductor material layer comprising a first element and a second element on a semiconductor substrate. A mask is formed on the alloy semiconductor material layer to provide a masked portion and an unmasked portion of the alloy semiconductor material layer. The unmasked portion of the alloy semiconductor material layer not covered by the mask is irradiated with radiation from a radiation source to transform the alloy semiconductor material layer so that a surface region of the unmasked portion of the alloy semiconductor material layer has a higher concentration of the second element than an internal region of the unmasked portion of the alloy semiconductor material layer. The surface region surrounds the internal region.Type: ApplicationFiled: July 7, 2017Publication date: May 31, 2018Inventors: Fang-Liang LU, I-Hsieh WONG, Shih-Ya LIN, CheeWee LIU, Samuel C. PAN
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Publication number: 20130114213Abstract: An electronic device having a base includes a circuit board, a electronic element, and a heat sink. The electronic element is mounted on the circuit board. The heat sink attaches to the electronic element. The heat sink includes an attaching wall and at least one side wall. The attaching wall attaches to the electronic element and having two opposite ends. At least one side wall connects to the ends of the attaching wall. The side wall and the attaching wall form a tube with an intake opening and an outtake opening. The intake opening faces the base and the outtake opening is opposite to the intake opening.Type: ApplicationFiled: November 9, 2011Publication date: May 9, 2013Applicant: SILICON INTERGRATED SYSTEMS CORP.Inventors: Tsai-Chih Tsai, Yin-Chieh Hsueh, Shih-Ya Lin