Patents by Inventor Shih Yu Chang

Shih Yu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240387254
    Abstract: A semiconductor structure includes a via in contact with a conductive line and extending through a first etch stop layer, a first inter-metal dielectric layer, and a second etch stop layer. The second etch stop layer is disposed over the first inter-metal dielectric layer, and the first inter-metal dielectric layer is disposed over the first etch stop layer. The semiconductor structure also includes a trench in contact with the via and extending through an insulating layer and a second inter-metal dielectric layer. The second inter-metal dielectric layer is disposed over the insulating layer which is disposed over the second etch stop layer.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Han Chen, Shih-Yu Chang, Chien-Chih Chiu, Yi-Tang Chen, Da-Wei Lin
  • Publication number: 20240387227
    Abstract: Semiconductor devices, methods of manufacturing the semiconductor device and tools are disclosed herein. Some methods include providing an electrostatic chuck and placing an edge ring adjacent to the electrostatic chuck. The electrostatic chuck includes a first electrode to generate a sheath at a first distance over the electrostatic chuck. The edge ring includes a coil and a second electrode to generate an electric field control to maintain a portion of the sheath over the edge ring in a coplanar orientation with the portion of the sheath over the electrostatic chuck.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventors: Shih-Yu Chang, Chien-Han Chen, Chien-Chih Chiu, Chi-Che Tseng
  • Patent number: 12148657
    Abstract: A semiconductor interconnect structure includes a conductive line electrically coupled to an active semiconductor device, a first etch stop layer formed over the conductive line, a first dielectric layer formed over the first etch stop layer, a second etch stop layer formed over the first dielectric layer, a second dielectric layer formed over the second etch stop layer, and an interconnect structure electrically coupled to the via and extending through the first etch stop layer, the first dielectric layer, the second etch stop layer, and the second dielectric layer. The interconnect structure includes a via extending through the first etch stop layer, the second etch stop layer, and the first dielectric layer and a trench extending through the second dielectric layer.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: November 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Han Chen, Shih-Yu Chang, Chien-Chih Chiu, Yi-Tang Chen, Da-Wei Lin
  • Publication number: 20240332069
    Abstract: A semiconductor interconnect structure includes a conductive line electrically coupled to an active semiconductor device, a first etch stop layer formed over the conductive line, a first dielectric layer formed over the first etch stop layer, a second etch stop layer formed over the first dielectric layer, a second dielectric layer formed over the second etch stop layer, and an interconnect structure electrically coupled to the via and extending through the first etch stop layer, the first dielectric layer, the second etch stop layer, and the second dielectric layer. The interconnect structure includes a via extending through the first etch stop layer, the second etch stop layer, and the first dielectric layer and a trench extending through the second dielectric layer.
    Type: Application
    Filed: March 27, 2023
    Publication date: October 3, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Han Chen, Shih-Yu Chang, Chien-Chih Chiu, Y.T. Chen, Da-Wei Lin
  • Publication number: 20230377956
    Abstract: A method of forming a semiconductor device structure is disclosed. First and second etch stop layers are formed overlying a semiconductor structure having a conductive feature formed therein. A dielectric layer is formed overlying the second etch stop layer, and a hard mask, that comprises a tungsten-based material, is formed overlying the dielectric layer, and patterned. A resist layer is formed over the patterned hard mask. Using the patterned resist layer as a mask, a first etching process is performed to form a via opening that extends partially through the dielectric layer. Using the patterned hard mask as an etch mask, a second etching process (e.g., dry etching process) is performed to extend the via opening through the second etch stop layer, and a third etching process (e.g., wet etching process) is performed to extend the via opening through the first etch stop layer to reach the conductive feature.
    Type: Application
    Filed: May 23, 2022
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Han Chen, Shih-Yu Chang, Chien-Chih Chiu, Huang-Ming Chen
  • Publication number: 20230155001
    Abstract: A method includes forming a transistor comprising a source/drain region and a gate electrode, forming a source/drain contact plug over and electrically connecting to the source/drain region, forming a first inter-layer dielectric over the source/drain contact plug, forming an etch stop layer over the first inter-layer dielectric, etching the etch stop layer to form a first via opening, forming a second inter-layer dielectric over the first inter-layer dielectric, performing an etching process, so that the second inter-layer dielectric is etched to form a trench, and the first via opening in the etch stop layer is extended into the first inter-layer dielectric to reveal the source/drain contact plug, and filling the trench and the first via opening in common processes to form a metal line and a via, respectively.
    Type: Application
    Filed: February 16, 2022
    Publication date: May 18, 2023
    Inventors: Chien-Han Chen, Shih-Yu Chang, Chien-Chih Chiu, Huang-Ming Chen, Jyu-Horng Shieh
  • Patent number: 11615983
    Abstract: A semiconductor interconnect structure includes a conductive line electrically coupled to an active semiconductor device, a first etch stop layer formed over the conductive line, a first dielectric layer formed over the first etch stop layer, a second etch stop layer formed over the first dielectric layer, a second dielectric layer formed over the second etch stop layer, and an interconnect structure electrically coupled to the conductive line and extending through the first etch stop layer, the first dielectric layer, the second etch stop layer, and the second dielectric layer. The interconnect structure includes a via extending through the first etch stop layer, the second etch stop layer, and the first dielectric layer and a trench extending through the second dielectric layer.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: March 28, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Chien-Han Chen, Chien-Chih Chiu, Shih-Yu Chang, Da-Wei Lin, Y.T. Chen
  • Publication number: 20230028904
    Abstract: A method includes depositing an inter-metal dielectric (IMD) layer over a conductive line. A via opening is formed in the IMD layer and directly over the conductive line. A width of the conductive line is greater than a width of the via opening. An overlay measurement is performed. The overlay measurement includes obtaining a backscattered electron image of the via opening and the conductive line and determining an overlay between the via opening and the conductive line according to the backscattered electron image.
    Type: Application
    Filed: January 31, 2022
    Publication date: January 26, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yu CHANG, Chien-Han CHEN, Chien-Chih CHIU, Chi-Che TSENG
  • Publication number: 20220367226
    Abstract: Semiconductor devices, methods of manufacturing the semiconductor device and tools are disclosed herein. Some methods include providing an electrostatic chuck and placing an edge ring adjacent to the electrostatic chuck. The electrostatic chuck includes a first electrode to generate a sheath at a first distance over the electrostatic chuck. The edge ring includes a coil and a second electrode to generate an electric field control to maintain a portion of the sheath over the edge ring in a coplanar orientation with the portion of the sheath over the electrostatic chuck.
    Type: Application
    Filed: November 5, 2021
    Publication date: November 17, 2022
    Inventors: Shih-Yu Chang, Chien-Han Chen, Chien-Chih Chiu, Chi-Che Tseng
  • Publication number: 20210335661
    Abstract: A semiconductor interconnect structure includes a conductive line electrically coupled to an active semiconductor device, a first etch stop layer formed over the conductive line, a first dielectric layer formed over the first etch stop layer, a second etch stop layer formed over the first dielectric layer, a second dielectric layer formed over the second etch stop layer, and an interconnect structure electrically coupled to the via and extending through the first etch stop layer, the first dielectric layer, the second etch stop layer, and the second dielectric layer. The interconnect structure includes a via extending through the first etch stop layer, the second etch stop layer, and the first dielectric layer and a trench extending through the second dielectric layer.
    Type: Application
    Filed: February 3, 2021
    Publication date: October 28, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chien-Han Chen, Chien-Chih Chiu, Shih-Yu Chang, Da-Wei Lin, Y.T. Chen
  • Patent number: 10290535
    Abstract: Examples of fabricating an integrated circuit device are disclosed herein. In an embodiment, an integrated circuit workpiece is received that includes a conductive interconnect feature. A first Inter-Level Dielectric (ILD) layer is formed on the conductive interconnect feature, and a second ILD layer is formed on the first ILD layer. A hard mask is formed on the second ILD layer. A via recess is etched extending through the first ILD layer, the second ILD layer and the hard mask to expose the conductive interconnect feature. The etching includes providing a passivation agent that reacts with a material of the hard mask to reduce etchant sensitivity.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: May 14, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Te Ho, Shih-Yu Chang, Da-Wei Lin, Chien-Chih Chiu, Ming-Chung Liang
  • Patent number: 9491287
    Abstract: A ringtone assignment system and method are provided. The method includes steps of recording a multimedia ringtone via a first communication device, transmitting a communication linking request to a communication exchange host, transmitting the communication linking request to a second communication device via the communication exchange host to enable the second communication device to feed back ringtone format information supported by the second communication device according to the communication linking request, transmitting the ringtone format information to the first communication device via the communication exchange host to enable the first communication device to code the multimedia ringtone according to the ringtone format information, transmitting the multimedia ringtone from the first communication device to the second communication device, and then decoding and playing the multimedia ringtone by the second communication device.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: November 8, 2016
    Assignee: CHUNGHWA TELECOM CO., LTD.
    Inventors: Fu-Rong Zheng, Chi-Hung Lien, Yi-Hsiu Lin, Shih-Yu Chang, Kuan-Feng Wu
  • Patent number: 9380954
    Abstract: A method for physiological signal analysis and its system and a computer program product storing a physiological signal analysis program are provided. Physiological signals of a subject are collected for a user to provide a detection opinion for the physiological signals in order to generate syndrome recognition parameters and syndrome weight parameters such that the collected physiological signals are analyzed and determined. The invention performs detection determination by means of combining the physiological signals of the subject and referencing to an analysis opinion from the user. Therefore, an output detection result may be believed by both doctors and patients with effectively improved accuracy of analysis result to improve the efficiency of the user in diagnosis and treatment.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: July 5, 2016
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Shuenn-Yuh Lee, Shih-Yu Chang Chien
  • Publication number: 20160006642
    Abstract: A network-wide service controller comprises a monitoring device, an intelligent device, and a management device. The monitoring device is configured to monitor a state of at least one network. The intelligent device is configured to determine a path within the at least one network according to the state of the at least one network. The intelligent device is further configured to receive an instruction from a user and convert the instruction into a lower-level instruction. The management device is configured to analyze the lower-level instruction from the intelligent device and control forwarding of packets according to a result of analysis of the lower-level instruction and the path determined by the intelligent device.
    Type: Application
    Filed: July 7, 2014
    Publication date: January 7, 2016
    Inventors: SHIH YU CHANG, YU PING JANG, TIN WEI LIN
  • Publication number: 20150359450
    Abstract: A method for physiological signal analysis and its system and a computer program product storing a physiological signal analysis program are provided. Physiological signals of a subject are collected for a user to provide a detection opinion for the physiological signals in order to generate syndrome recognition parameters and syndrome weight parameters such that the collected physiological signals are analyzed and determined. The invention performs detection determination by means of combining the physiological signals of the subject and referencing to an analysis opinion from the user. Therefore, an output detection result may be believed by both doctors and patients with effectively improved accuracy of analysis result to improve the efficiency of the user in diagnosis and treatment.
    Type: Application
    Filed: March 9, 2015
    Publication date: December 17, 2015
    Inventors: Shuenn-Yuh Lee, Shih-Yu Chang Chien
  • Publication number: 20150318256
    Abstract: A packaging substrate is provided, which includes: a laminated body; first, second and third conductive pads formed on a surface of the laminated body so as for conductive bumps to be respectively mounted thereon, wherein the third conductive pad is positioned outside of an area between projections of the conductive bumps on the first and second conductive pads on the surface of the laminated body; first, second and third conductive vias formed in the laminated body and electrically connected to the first, second and third conductive pads, respectively; and first, second and third internal conductive traces formed in the laminated body and electrically connected to the first, second and third conductive vias, respectively, thereby preventing bridging from occurring between the conductive bumps and the conductive traces and overcoming non-wetting of the conductive bumps caused by a solder mask layer.
    Type: Application
    Filed: August 18, 2014
    Publication date: November 5, 2015
    Inventors: Shih-Yu Chang, Kuo-Ching Tsai
  • Publication number: 20150181030
    Abstract: A ringtone assignment system and method are provided. The method includes steps of recording a multimedia ringtone via a first communication device, transmitting a communication linking request to a communication exchange host, transmitting the communication linking request to a second communication device via the communication exchange host to enable the second communication device to feed back ringtone format information supported by the second communication device according to the communication linking request, transmitting the ringtone format information to the first communication device via the communication exchange host to enable the first communication device to code the multimedia ringtone according to the ringtone format information, transmitting the multimedia ringtone from the first communication device to the second communication device, and then decoding and playing the multimedia ringtone by the second communication device.
    Type: Application
    Filed: October 1, 2014
    Publication date: June 25, 2015
    Inventors: Fu-Rong Zheng, Chi-Hung Lien, Yi-Hsiu Lin, Shih-Yu Chang, Kuan-Feng Wu
  • Publication number: 20150113643
    Abstract: A method for information security comprises determining by a first processor whether web content includes malicious software by matching the web content with at least one recorded threat, determining by the first processor whether the quantity of malicious software reaches a threshold, processing by a second processor the malicious software with a cryptographic protocol to generate a processing result, if the quantity of malicious software reaches the threshold, and generating a message indicating a threat in response to the processing result.
    Type: Application
    Filed: October 17, 2013
    Publication date: April 23, 2015
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: SHIH YU CHANG, TIN WEI LIN
  • Patent number: 7370740
    Abstract: A retractable handle assembly for luggage case is disclosed. In a pulling operation, press a push button to unlock a locking device such that a damping device thereunder is free to damply extend upward a predetermined distance in a substantially stable speed for easing a pulling of the handle thereafter.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: May 13, 2008
    Assignee: Chaw Khong Technology Co., Ltd.
    Inventors: Shih Yu Chang, Chung-Hsien Kuo
  • Patent number: 7232019
    Abstract: A seamless handle grip assembly mounted on a single pulling rod of luggage is provided. The assembly comprises a tube a top grip section, a spring depressible push button a hollow, cylindrical left member inserted into a left portion of the tube, a hollow, cylindrical right member inserted into a right portion of the tube to matingly couple to the left member, a bottom grip section threadedly secured to the top grip section with the tube fastened therebetween, and a rod inserted upwardly through the bottom grip section into the tube and the spring to fixedly couple to the push button.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: June 19, 2007
    Assignee: Chaw Khong Technology Co., Ltd.
    Inventors: Shih Yu Chang, Chung-Hsien Kuo, Chia-Hsien Lin