Patents by Inventor Shih-Yu Lin

Shih-Yu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250064345
    Abstract: A gait evaluating system including a processor is provided. The processor identifies whether a gait type of the user belongs to a normal gait, a non-neuropathic gait or a neuropathic gait based on step feature values of a user and walking limb feature values of the user. In response to that the gait type of the user belongs to the non-neuropathic gait, the processor controls the display panel to display a first auxiliary information, a second auxiliary information, and a third auxiliary information. The first auxiliary information indicates a potential sarcopenia of the user. The second auxiliary information indicates a dietary guideline for muscle building and muscle strengthening. The third auxiliary information shows a motion instruction video for regaining or maintaining muscle strength of the user.
    Type: Application
    Filed: October 18, 2024
    Publication date: February 27, 2025
    Applicant: Industrial Technology Research Institute
    Inventors: Je-Ping Hu, Keng-Hsun Lin, Shih-Fang Yang Mao, Pin-Chou Li, Jian-Hong Wu, Szu-Ju Li, Hui-Yu Cho, Yu-Chang Chen, Yen-Nien Lu, Jyun-Siang Hsu, Nien-Ya Lee, Kuan-Ting Ho, Ming-Chieh Tsai, Ching-Yu Huang
  • Patent number: 12234569
    Abstract: A fabricating method of a non-enzyme sensor element includes a printing step, a coating step and an electroplating step. In the printing step, a conductive material is printed on a surface of a substrate to form a working electrode, a reference electrode and an auxiliary electrode, and a porous carbon material is printed on the working electrode to form a porous carbon layer. In the coating step, a graphene film material is coated on the porous carbon layer of the working electrode to form a graphene layer. In the electroplating step, a metal is electroplated on the graphene layer by a pulse constant current to form a catalyst layer including a metal oxide.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: February 25, 2025
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Hsiang-Yu Wang, Yi-Yu Chen, Shih-Hao Lin, Yu-Sheng Lin
  • Patent number: 12230545
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Grant
    Filed: November 30, 2023
    Date of Patent: February 18, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Publication number: 20250051441
    Abstract: This disclosure relates to protein complexes targeting CD47 and 4-1BB, and methods of use thereof. In one aspect, the protein complexes include one or more CD47-binding domains including all or a portion of the SIRP? extracellular regions, and one or more 4-1BB-binding domains including all or a portion of the 4-1BBL extracellular region.
    Type: Application
    Filed: December 9, 2022
    Publication date: February 13, 2025
    Inventors: Chun-Yu Lin, Shih-Han Huang, Yi-Chun HSIEH, Chi-Ling Tseng
  • Patent number: 12223127
    Abstract: An active stylus having physical writing function includes a tip shell including a first opening and a second opening, a first electrode including a first end protruded through the first opening of the tip shell and including a second end protruded through the second opening of the tip shell and entered a main body housing of the active stylus, wherein the first electrode includes conductive material. The tip shell includes non-conductive material. The first end of the first electrode is configured to leave colored traces on an object by physical friction caused between the first end of the first electrode and the object.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: February 11, 2025
    Assignees: Renaisser Technology Co., Ltd. Corp., Dexin Corp.
    Inventors: Shih-Yen Lee, Tzu-Yu Ting, Yeh Sen-Fan Chueh, Min-Hung Lin, Shih-Hsiung Hsiao
  • Patent number: 12221411
    Abstract: The invention relates to processes for preparing carbaprostacyclin analogues and intermediates prepared from the processes. The invention also relates to cyclopentenone intermediates in racemic or optically active form.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: February 11, 2025
    Assignee: CHIROGATE INTERNATIONAL INC.
    Inventors: Chun-Yu Lin, Tzyh-Mann Wei, Shih-Yi Wei
  • Publication number: 20250040214
    Abstract: A semiconductor fabrication method includes: forming an epitaxial stack including at least one sacrificial epitaxial layer and at least one channel epitaxial layer; forming a plurality of fins in the epitaxial stack; performing tuning operations to prevent a width of the sacrificial epitaxial layer expanding beyond a width of the channel epitaxial layer during operations to form isolation features; forming the isolation features between the plurality of fins, wherein the width of the sacrificial epitaxial layer does not expand beyond the width of the channel epitaxial layer; forming a sacrificial gate stack; forming gate sidewall spacers on sidewalls of the sacrificial gate stack; forming inner spacers around the sacrificial epitaxial layer and the channel epitaxial layer; forming source/drain features; removing the sacrificial gate stack and sacrificial epitaxial layer; and forming a replacement metal gate, wherein the metal gate is shielded from the source/drain features.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Shih-Yao Lin, Chiung-Yu Cho, Po-Yuan Tseng, Min-Chiao Lin, Chen-Ping Chen, Chih-Han Lin, Ming-Ching Chang
  • Patent number: 12204163
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: February 5, 2024
    Date of Patent: January 21, 2025
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20250022914
    Abstract: A method of forming a nanosheet FET is provided. A plurality of first and second semiconductor layers are alternately formed on a substrate. The first and second semiconductor layers are patterned into a plurality of stacks of semiconductor layers separate from each other by a space along a direction. Each stack of semiconductor layers has a cross-sectional view along the direction gradually widening towards the substrate. An epitaxial feature is formed in each of the spaces. The patterned second semiconductor layers are then removed from each of the stacks of semiconductor layers.
    Type: Application
    Filed: July 14, 2023
    Publication date: January 16, 2025
    Inventors: Kuei-Yu KAO, Shih-Yao LIN, Chiung-Yu CHO, Chen-Ping CHEN, Chih-Han LIN, Ming-Ching CHANG
  • Patent number: 8104979
    Abstract: A keyboard includes a first housing having a plurality of first magnetic elements, a keystroke module having a key portion disposed on the first housing, a second housing combining with the first housing and has an opening, and an actuating assembly. The keystroke module is disposed corresponding to the opening. The actuating assembly is disposed movably on the second housing and has a plurality of second magnetic elements. The keystroke module is not protruded from the opening and is at a packing position. When the actuating assembly is moved along an actuating direction, at least one first magnetic element and at least one second magnetic element attract to each other to shorten the distance, which brings the second housing to move relatively to the first housing so that the key portion of the keystroke module passes though the opening and is at a using position.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: January 31, 2012
    Assignee: ASUSTeK Computer Inc.
    Inventors: Shih-Po Chien, Yu-Chuan Chang, Shih-Yu Lin, Chang-Chi Lai
  • Publication number: 20090135554
    Abstract: A keyboard includes a first housing having a plurality of first magnetic elements, a keystroke module having a key portion disposed on the first housing, a second housing combining with the first housing and has an opening, and an actuating assembly. The keystroke module is disposed corresponding to the opening. The actuating assembly is disposed movably on the second housing and has a plurality of second magnetic elements. The keystroke module is not protruded from the opening and is at a packing position. When the actuating assembly is moved along an actuating direction, at least one first magnetic element and at least one second magnetic element attract to each other to shorten the distance, which brings the second housing to move relatively to the first housing so that the key portion of the keystroke module passes though the opening and is at a using position.
    Type: Application
    Filed: October 27, 2008
    Publication date: May 28, 2009
    Inventors: Shih-Po CHIEN, Yu-Chuan CHANG, Shih-Yu LIN, Chang-Chi LAI
  • Patent number: 7339334
    Abstract: The present invention discloses a real-time responsive motor control system comprising a central MCU (Microcontroller Unit) core logic and at least one PWM (Pulse Width Modulation) MCU core logic. The central MCU core logic takes care of all interrupt events. The PWM (Pulse Width Modulation) MCU core logic is dedicated to the transformation of PWM signals so that the PWM signals output to a motor device are highly accurate. Further, the central MCU core logic may directly control the PWM MCU core logics so that the switching timing of the PWM signals is even more accurate. The present invention provides a modularized hardware architecture with flexible software control. The system design is simple and the associated cost is reduced.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: March 4, 2008
    Assignee: Padauk Technology Co., Ltd.
    Inventors: Chuan-Po Ling, Jung-Lin Chang, Shih-Yu Lin
  • Publication number: 20070248337
    Abstract: The present invention discloses a real-time responsive motor control system comprising a central MCU (Microcontroller Unit) core logic and at least one PWM (Pulse Width Modulation) MCU core logic. The central MCU core logic takes care of all interrupt events. The PWM (Pulse Width Modulation) MCU core logic is dedicated to the transformation of PWM signals so that the PWM signals output to a motor device are highly accurate. Further, the central MCU core logic may directly control the PWM MCU core logics so that the switching timing of the PWM signals is even more accurate. The present invention provides a modularized hardware architecture with flexible software control. The system design is simple and the associated cost is reduced.
    Type: Application
    Filed: April 19, 2006
    Publication date: October 25, 2007
    Inventors: Chuan-Po Ling, Jung-Lin Chang, Shih-Yu Lin
  • Publication number: 20070245120
    Abstract: In a multiple microcontroller system comprising multiple MCU core logics, a multiple-MCU-core-logic selection operand is provided in an instruction according to this invention. The multiple-MCU-core-logic selection operand specifies or selects a corresponding MCU core logic in the system, and also specifies or selects a sub-unit of the MCU core logic, when necessary. Any MCU core logic in the system may be used as a main operation microcontroller unit to fetch and decode this instruction. An operation action corresponding to an operation code in the instruction is performed on the selected MCU core logic corresponding to the multiple-MCU-core-logic selection operand. The multiple microcontroller system can therefore directly specify an MCU core logic, and its sub-unit if necessary, on which a desired action is to be performed. Moreover, different MCUs in the multiple microcontroller system can share resources and control one another. True parallel processing is thus achieved.
    Type: Application
    Filed: April 14, 2006
    Publication date: October 18, 2007
    Inventors: Jung Chang, Chuan Ling, Shih-Yu Lin
  • Publication number: 20050266790
    Abstract: The present invention relates to an air scoop cooler. The air scoop cooler comprises a hollow duct, an exhaust opening, which can install an exhaust fan, and an entry opening on the top of the duct. The duct comprises a pull, a pin, and a hook to attach and to couple easily with a chassis of computer. On the top of the duct also comprises a plurality of protrusions against the chassis to fix. The CPU including its radiator and part of the mainboard including its electronic devices can be covered in the duct. The duct isolate noise of the fan of the radiator of CPU, and the exhaust fan exhausts inside warm air so that the outside cool air will stream into the duct via the entry opening forming airflow convection. In this invention the convection in the air scoop cooler can efficiently dissipate heat from working CPU and other electronic devices covered in the duct outside the chassis to cool devices down, and also keep silent operation.
    Type: Application
    Filed: October 20, 2004
    Publication date: December 1, 2005
    Inventor: Shih Yu-Lin
  • Publication number: 20050191390
    Abstract: The invention provides compositions and methods for providing edible gloss coatings for foods on which a gloss coating is desirable. The invention is particularly useful for providing gloss coatings to confections, such as chocolates, hard panned confections, soft panned confections, yogurt coated confections, starch molded confections, and compressed sugar tablets. The invention further provides methods for delaying the development of rancidity in nuts by coating the nut with a film-forming coating in a solution containing a surfactant in an amount larger than that which reduces the surface energy of the solution to its lowest level.
    Type: Application
    Filed: March 1, 2004
    Publication date: September 1, 2005
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: John Krochta, Kirsten Dangaran, Shih-Yu Lin