Patents by Inventor Shih-Yu Wu

Shih-Yu Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961732
    Abstract: A method includes depositing a first work-function layer and a second work-function layer in a first device region and a second device region, respectively, and depositing a first fluorine-blocking layer and a second fluorine-blocking layer in the first device region and the second device region, respectively. The first fluorine-blocking layer is over the first work-function layer, and the second fluorine-blocking layer is over the second work-function layer. The method further includes removing the second fluorine-blocking layer, and forming a first metal-filling layer over the first fluorine-blocking layer, and a second metal-filling layer over the second work-function layer.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Ching Lee, Chung-Chiang Wu, Shih-Hang Chiu, Hsuan-Yu Tung, Da-Yuan Lee
  • Patent number: 11941821
    Abstract: An image sleep analysis method and system thereof are disclosed. During sleep duration, a plurality of visible-light images of a body are obtained. Positions of image differences are determined by comparing the visible-light images. A plurality of features of the visible-light images are identified and positions of the features are determined. According to the positions of the image differences and features, the motion intensities of the features are determined. Therefore, a variation of the motion intensities is analyzed and recorded to provide accurate sleep quality.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: March 26, 2024
    Assignee: YUN YUN AI BABY CAMERA CO., LTD.
    Inventors: Bo-Zong Wu, Meng-Ta Chiang, Chia-Yu Chen, Shih-Yun Shen
  • Publication number: 20240096941
    Abstract: A semiconductor structure includes a substrate with a first surface and a second surface opposite to the first surface, a first and a second shallow trench isolations disposed in the substrate and on the second surface, a deep trench isolation structure in the substrate and coupled to the first shallow trench isolation, a first dielectric layer disposed on the first surface and coupled to the deep trench isolation structure, a second dielectric layer disposed over the first dielectric layer and coupled to the deep trench isolation structure, a third dielectric layer comprising a horizontal portion disposed over the second dielectric layer and a vertical portion coupled to the horizontal portion, and a through substrate via structure penetrating the substrate from the first surface to the second surface and penetrating the second shallow trench isolation.
    Type: Application
    Filed: January 11, 2023
    Publication date: March 21, 2024
    Inventors: SHIH-JUNG TU, PO-WEI LIU, TSUNG-YU YANG, YUN-CHI WU, CHIEN HUNG LIU
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20240088019
    Abstract: A connecting structure includes a first dielectric layer, a first connecting via in the first dielectric layer, a second connecting via in the first dielectric layer, and an isolation between the first connecting via and the second connecting via. The isolation separates the first and second connecting vias from each other. The first connecting via, the isolation and the second connecting via are line symmetrical about a central line perpendicular to a top surface of the first dielectric layer.
    Type: Application
    Filed: January 11, 2023
    Publication date: March 14, 2024
    Inventors: CHIA CHEN LEE, CHIA-TIEN WU, SHIH-WEI PENG, KUAN YU CHEN
  • Patent number: 10971677
    Abstract: An electrically controlled nanomagnet and a spin orbit torque magnetic random access memory (SOT-MRAM) including the same are provided. The electrically controlled nanomagnet includes: a first spin-Hall material layer including a first spin-Hall material; a second spin-Hall material layer including a second spin-Hall material; and a first magnetic layer disposed between the first spin-Hall material layer and the second spin-Hall material layer, wherein the first spin-Hall material and the second spin-Hall material are substantially mirror image to each other.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: April 6, 2021
    Assignee: ACADEMIA SINICA
    Inventors: Hsin Lin, Shih-Yu Wu, Chuang-Han Hsu
  • Publication number: 20200212294
    Abstract: An electrically controlled nanomagnet and a spin orbit torque magnetic random access memory (SOT-MRAM) including the same are provided. The electrically controlled nanomagnet includes: a first spin-Hall material layer including a first spin-Hall material; a second spin-Hall material layer including a second spin-Hall material; and a first magnetic layer disposed between the first spin-Hall material layer and the second spin-Hall material layer, wherein the first spin-Hall material and the second spin-Hall material are substantially mirror image to each other.
    Type: Application
    Filed: December 11, 2019
    Publication date: July 2, 2020
    Inventors: Hsin LIN, Shih-Yu WU, Chuang-Han HSU
  • Patent number: 8623680
    Abstract: An LED chip package structure using sedimentation includes a package body, at least two conductive substrates, at least one light-emitting element, and a package unit. The package body has a receiving space. The two conductive substrates are received in the receiving space. The light-emitting element is received in the receiving space and electrically connected to the two conductive substrates. The package unit has a package colloid layer and a powder mixed into the package colloid layer, and the package unit is filled into the receiving space. The powder is uniformly deposited in the receiving space by maintaining the package unit at room temperature firstly and the powder is solidified in the receiving space by heating to a predetermined temperature.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: January 7, 2014
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Shih-Yu Wu, Chao-Yuan Huang, Ping-Chou Yang, Cheng-Yen Chiang
  • Patent number: 8198800
    Abstract: An LED chip package structure in order to prevent the light-emitting efficiency of fluorescent powder from decreasing due to high temperature includes a substrate unit, a light-emitting unit, a transparent colloid body unit, a fluorescent colloid body unit and a frame unit. The light-emitting unit has a plurality of LED chips electrically arranged on the substrate unit. The transparent colloid body unit has a plurality of transparent colloid bodies respectively covering the LED chips. The fluorescent colloid body unit has a plurality of fluorescent colloid bodies respectively covering the transparent colloid bodies. The frame unit is covering the peripheries of each transparent colloid body and each fluorescent colloid body in order to expose the top surfaces of the fluorescent colloid body.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: June 12, 2012
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Shih-Yu Wu, Wen-Kuei Wu
  • Patent number: 8183065
    Abstract: An LED chip package structure with high-efficiency light emission by rough surfaces includes a substrate unit, a light-emitting unit, and a package colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace respectively formed on the substrate body. The light-emitting unit has a plurality of LED chips arranged on the substrate body. Each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the positive electrode trace and the negative electrode trace of the substrate unit. The package colloid unit has a plurality of package colloids respectively covering the LED chips. Each package colloid has a cambered colloid surface and a light-emitting colloid surface respectively formed on its top surface and a lateral surface thereof.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: May 22, 2012
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Shih-Yu Wu, Wen-Kuei Wu
  • Patent number: 8162510
    Abstract: A LED chip package structure with multifunctional integrated chips includes a substrate unit, a light-emitting unit, a chip unit, and a package colloid unit. The light-emitting unit has a plurality of LED chips electrically arranged on the substrate unit. The chip unit is electrically arranged on the substrate unit, and the chip unit is arranged between the light-emitting unit and a power source. The package colloid unit covers the LED chips. The package colloid unit is a strip fluorescent colloid corresponding to the LED chips.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: April 24, 2012
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Shih-Yu Wu, Wen-Kuei Wu
  • Patent number: 8138508
    Abstract: An LED chip package structure with different LED spacing includes a substrate unit, a light-emitting unit, and a package colloid unit. The light-emitting unit has a plurality of LED chips electrically arranged on the substrate unit, and the LEDs are separated from each other by totally different spacing or partially different spacing. For example, the spacings between each two LED chips are from rarefaction to condensation, from condensation to rarefaction, from center rarefaction to outer condensation, from center condensation to outer rarefaction, alternate rarefaction and condensation, or alternate condensation and rarefaction. The package colloid unit covers the LED chips.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: March 20, 2012
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Shih-Yu Wu, Wen-Kuei Wu
  • Publication number: 20120049212
    Abstract: An LED chip package structure with a high-efficiency heat-dissipating substrate includes a substrate unit, an adhesive body, a plurality of LED chips, package bodies and frame layers. The substrate unit has a positive substrate, a negative substrate, and a plurality of bridge substrates separated from each other and disposed between the positive and the negative substrate. The adhesive body is filled between the positive, the negative and the bridge substrates in order to connect and fix the positive substrate, the negative substrate and the bridge substrates together. The LED chips are disposed on the substrate unit and electrically connected between the positive substrate and the negative substrate. The package bodies are respectively covering the LED chips. The frame layers are respectively disposed around the packages bodies in order to form a plurality of light-projecting surfaces on the package bodies, and the light-projecting surfaces correspond to the LED chips.
    Type: Application
    Filed: November 9, 2011
    Publication date: March 1, 2012
    Applicant: HARVATEK CORPORATION
    Inventors: BILY WANG, SHIH-YU WU, WEN-KUEI WU
  • Publication number: 20120003765
    Abstract: An LED chip package structure using sedimentation includes a package body, at least two conductive substrates, at least one light-emitting element, and a package unit. The package body has a receiving space. The two conductive substrates are received in the receiving space. The light-emitting element is received in the receiving space and electrically connected to the two conductive substrates. The package unit has a package colloid layer and a powder mixed into the package colloid layer, and the package unit is filled into the receiving space. The powder is uniformly deposited in the receiving space by maintaining the package unit at room temperature firstly and the powder is solidified in the receiving space by heating to a predetermined temperature.
    Type: Application
    Filed: September 14, 2011
    Publication date: January 5, 2012
    Applicant: HARVATEK CORPORATION
    Inventors: BILY WANG, SHIH-YU WU, CHAO-YUAN HUANG, PING-CHOU YANG, CHENG-YEN CHIANG
  • Patent number: 8017969
    Abstract: An LED chip package structure with high-efficiency light emission by rough surfaces includes a substrate unit, a light-emitting unit, and a package colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace respectively formed on the substrate body. The light-emitting unit has a plurality of LED chips arranged on the substrate body. Each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the positive electrode trace and the negative electrode trace of the substrate unit. The package colloid unit has a plurality of package colloids respectively covering the LED chips. Each package colloid has a cambered colloid surface and a light-emitting colloid surface respectively formed on its top surface and a lateral surface thereof.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: September 13, 2011
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Shih-Yu Wu, Wen-Kuei Wu
  • Patent number: 8002436
    Abstract: An LED chip package structure using a substrate as a lampshade includes a substrate unit and a light-emitting unit. The substrate unit has a substrate body with a lampshade shape. The light-emitting unit has a plurality of light-emitting elements electrically disposed on an inner surface of the substrate body. Therefore, one part of light beams projected by the light emitting elements is reflected out of the lampshade by the inner surface of the substrate body.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: August 23, 2011
    Assignee: Harvatek Corportion
    Inventors: Bily Wang, Shih-Yu Wu, Wen-Kuei Wu
  • Publication number: 20110189803
    Abstract: An LED chip package structure in order to prevent the light-emitting efficiency of fluorescent powder from decreasing due to high temperature includes a substrate unit, a light-emitting unit, a transparent colloid body unit, a fluorescent colloid body unit and a frame unit. The light-emitting unit has a plurality of LED chips electrically arranged on the substrate unit. The transparent colloid body unit has a plurality of transparent colloid bodies respectively covering the LED chips. The fluorescent colloid body unit has a plurality of fluorescent colloid bodies respectively covering the transparent colloid bodies. The frame unit is covering the peripheries of each transparent colloid body and each fluorescent colloid body in order to expose the top surfaces of the fluorescent colloid body.
    Type: Application
    Filed: April 15, 2011
    Publication date: August 4, 2011
    Applicant: HARVATEK CORPORATION
    Inventors: BILY WANG, SHIH-YU WU, WEN-KUEI WU
  • Publication number: 20110020967
    Abstract: An LED chip package structure with high-efficiency light emission by rough surfaces includes a substrate unit, a light-emitting unit, and a package colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace respectively formed on the substrate body. The light-emitting unit has a plurality of LED chips arranged on the substrate body. Each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the positive electrode trace and the negative electrode trace of the substrate unit. The package colloid unit has a plurality of package colloids respectively covering the LED chips. Each package colloid has a cambered colloid surface and a light-emitting colloid surface respectively formed on its top surface and a lateral surface thereof.
    Type: Application
    Filed: October 1, 2010
    Publication date: January 27, 2011
    Applicant: HARVATEK CORPORATION
    Inventors: BILY WANG, SHIH-YU WU, WEN-KUEI WU
  • Patent number: 7828464
    Abstract: An LED lamp structure with high-efficiency heat-dissipating function includes a heat-dissipating module, a light-emitting module, a power-transmitting module, and a casing module. The heat-dissipating module has a plurality of heat-dissipating fins, and the heat-dissipating fins are combined together to form a radial shape and a receiving space. The light-emitting module is received in the receiving space of the heat-dissipating module. The power-transmitting module is electrically connected with the light-emitting module. The casing module has a top board body, a bottom board body mated with the top board body, and a joint board body disposed between the top board body and the heat-dissipating fins. Both the top board body and the joint board body have an opening for exposing the light-emitting module. Each heat-dissipating fin has a top side contacted with the joint board body and a bottom side separated from the bottom board body by a predetermined distance.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: November 9, 2010
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Jonnie Chuang, Shih-Yu Wu
  • Patent number: 7829901
    Abstract: An LED chip package structure with high-efficiency light-emitting effect includes a substrate unit, a light-emitting unit, a package colloid unit, and a frame unit. The light-emitting unit has a plurality of LED chips electrically arranged on the substrate unit. The package colloid unit has a longitudinal package colloid covering the LED chips, and the longitudinal package colloid has a cambered colloid surface and a light-emitting colloid surface respectively formed on its top surface and a lateral surface thereof. The frame unit that is a frame layer covering the substrate unit and disposed around a lateral side of the longitudinal package colloid for exposing the light-emitting colloid surface of the longitudinal package colloid.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: November 9, 2010
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Shih-Yu Wu, Wen-Kuei Wu