Patents by Inventor Shih-Chieh Lee
Shih-Chieh Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240146205Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.Type: ApplicationFiled: September 23, 2023Publication date: May 2, 2024Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
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Patent number: 11973127Abstract: Semiconductor structures and method for forming the same are provide. The semiconductor structure includes a fin structure protruding from a substrate and a gate structure formed across the fin structure. The semiconductor structure further includes an Arsenic-doped region formed in the fin structure and a source/drain structure formed over the Arsenic-doped region. In addition, a bottommost portion of the Arsenic-doped region is lower than a bottommost portion of the source/drain structure.Type: GrantFiled: November 4, 2020Date of Patent: April 30, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shahaji B. More, Shih-Chieh Chang, Cheng-Han Lee, Huai-Tei Yang
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Publication number: 20240136463Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.Type: ApplicationFiled: December 20, 2023Publication date: April 25, 2024Applicant: EPISTAR CORPORATIONInventors: Yi-Chieh LIN, Shiuan-Leh LIN, Yung-Fu CHANG, Shih-Chang LEE, Chia-Liang HSU, Yi HSIAO, Wen-Luh LIAO, Hong-Chi SHIH, Mei-Chun LIU
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Publication number: 20240129766Abstract: A throttle control method for a mobile device include collecting input data, generating a first set of user experience indices according to the input data, and checking whether a user experience index of the first set of user experience indices satisfies a UEI threshold. The input data includes common information data, current configuration data and a plurality of throttle control parameters. Each user experience index of the first set of user experience indices is corresponding to at least one of throttle control parameter of the plurality of throttle control parameters.Type: ApplicationFiled: April 10, 2023Publication date: April 18, 2024Applicant: MediaTek Singapore Pte. Ltd.Inventors: Hung-Yueh Chen, Byeng Hyun Kim, JUNG SHUP SHIN, Shih-Hsin Chen, Chih-Chieh Lai, Chung-Pi Lee, JUNGWOO LEE, Yu-Lun Chang
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Publication number: 20240079524Abstract: A semiconductor device comprises a first semiconductor structure, a second semiconductor structure located on the first semiconductor structure, and an active layer located between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure has a first conductivity type, and includes a plurality of first layers and a plurality of second layers alternately stacked. The second semiconductor structure has a second conductivity type opposite to the first conductivity type. The plurality of first layers and the plurality of second layers include indium and phosphorus, and the plurality of first layers and the plurality of second layers respectively have a first indium atomic percentage and a second indium atomic percentage. The second indium atomic percentage is different from the first indium atomic percentage.Type: ApplicationFiled: September 6, 2023Publication date: March 7, 2024Inventors: Wei-Jen HSUEH, Shih-Chang LEE, Kuo-Feng HUANG, Wen-Luh LIAO, Jiong-Chaso SU, Yi-Chieh LIN, Hsuan-Le LIN
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Publication number: 20230367584Abstract: One or more components (e.g., devices) and/or component ensembles coupled to a local network utilize updatable software and/or firmware to perform, The component(s) (e.g., and ensembles thereof) can be updated using a scheme that enables recognition of the component(s) among a plurality of components, recognize the respective firmware and/or software versions, and targets relevant update(s) to component(s) requiring update.Type: ApplicationFiled: December 10, 2021Publication date: November 16, 2023Inventors: Daniel Dah Tai, Mahender Reddy Vangati, Darrel Q. Pham, Ralph Donald Fox, Shih-Chieh Lee, Tyler Eliot Peterson
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Patent number: 8576905Abstract: A central decoding controller and a central decoder controlling method are disclosed. A video stream is processed and transmitted via at least two parallel channels. The method comprises steps of: receiving a video key frame obtained by decoding an original video frame via a first channel, and a plurality of intra-description frames neighboring the video key frame; receiving a predictive video frame obtained by processing a prediction analysis and an error correction to the original video frame via a second channel parallel to the first channel; receiving a plurality of inter-description frames via the second channel, the inter-description frames neighboring the video key frame; calculating correlation of the video key frame, the intra-description frames, and the inter-description frames; and selecting the video key frame or the predictive video frame as an output frame according to the correlation result. The method can improve video quality under wireless transmission or unstable internet transmission.Type: GrantFiled: July 16, 2010Date of Patent: November 5, 2013Assignee: National Taiwan University of Science and TechnologyInventors: Jiann-jone Chen, Jyun-jie Jhuang, Shih-chieh Lee, Chen-hsiang Sun, Ching-hua Chen
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Publication number: 20110182359Abstract: A central decoding controller and a central decoder controlling method are disclosed. A video stream is processed and transmitted via at least two parallel channels. The method comprises steps of: receiving a video key frame obtained by decoding an original video frame via a first channel, and a plurality of intra-description frames neighboring the video key frame; receiving a predictive video frame obtained by processing a prediction analysis and an error correction to the original video frame via a second channel parallel to the first channel; receiving a plurality of inter-description frames via the second channel, the inter-description frames neighboring the video key frame; calculating correlation of the video key frame, the intra-description frames, and the inter-description frames; and selecting the video key frame or the predictive video frame as an output frame according to the correlation result. The method can improve video quality under wireless transmission or unstable internet transmission.Type: ApplicationFiled: July 16, 2010Publication date: July 28, 2011Applicant: National Taiwan University of Science and TechnologyInventors: Jiann-jone Chen, Jyun-jie Jhuang, Shih-chieh Lee, Chen-hsiang Sun, Ching-hua Chen
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Patent number: 7218587Abstract: A method for determining the writing power of data recording devices. First, the inner circle and outer circle of recording media are processed with optimum power calibration (OPC) to obtain an inner circle optimum writing power and an outer circle optimum writing power respectively. The writing power is determined according to the inner circle optimum writing power, outer circle optimum writing power, and/or the time of write speed is raised from the minimum write speed to the maximum write speed of the data recording device.Type: GrantFiled: May 2, 2003Date of Patent: May 15, 2007Assignee: ASUSTeK Computer Inc.Inventors: Hsien-Yu Tseng, Shih-Chieh Lee, Ching-Hwa Liu
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Patent number: 6922382Abstract: A method for adjusting the write speed of a data recording device and apparatus thereof. First, the recording media is written to at a write speed, during which the number of buffer underrun events is counted. Then, the write speed is adjusted according to the number of buffer underrun events until writing is finished.Type: GrantFiled: February 4, 2003Date of Patent: July 26, 2005Assignee: ASUSTeK Computer Inc.Inventors: Hsien-Yu Tseng, Shih-Chieh Lee, Ching-Hwa Liu
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Publication number: 20030210625Abstract: A method for determining the writing power of data recording devices. First, the inner circle and outer circle of recording media are processed with optimum power calibration (OPC) to obtain an inner circle optimum writing power and an outer circle optimum writing power respectively. The writing power is determined according to the inner circle optimum writing power, outer circle optimum writing power, and/or the time of write speed is raised from the minimum write speed to the maximum write speed of the data recording device.Type: ApplicationFiled: May 2, 2003Publication date: November 13, 2003Inventors: Hsien-Yu Tseng, Shih-Chieh Lee, Ching-Hwa Liu
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Patent number: 6643233Abstract: The invention provides a reliable write method of data on an optical record carrier without changing the conventional configuration of an information recording apparatus. The invention uses the errors occurred in reading ATIP codes and/or the reflected signal from the surface of the record carrier to decide if the storage unit on the record carrier is eligible to store data. The defective storage units are labeled as unrecordable.Type: GrantFiled: October 5, 2000Date of Patent: November 4, 2003Assignee: Acer Communications & Multimedia Inc.Inventors: Meng-Shin Yen, Lester Chen, Shih-Chieh Lee
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Publication number: 20030165094Abstract: A method for adjusting the writing speed of a data recording device. First, recording media is written to at a writing speed, the Absolute Time In Pregroove Error Rate (ATER) is calculated according to the error codes occurring in Absolute Time In Pregroove (ATIP) on the recording media when writing to the recording media. Then, the writing speed is adjusted according to the Absolute Time In Pregroove Error Rate (ATER) until writing to the recording media is finished.Type: ApplicationFiled: March 3, 2003Publication date: September 4, 2003Inventors: Hsien-Yu Tseng, Shih-Chieh Lee, Ching-Hwa Liu
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Publication number: 20030165097Abstract: A method for adjusting the write speed of a data recording device and apparatus thereof. First, the recording media is written to at a write speed, during which the number of buffer underrun events is counted. Then, the write speed is adjusted according to the number of buffer underrun events until writing is finished.Type: ApplicationFiled: February 4, 2003Publication date: September 4, 2003Inventors: Hsien-Yu Tseng, Shih-Chieh Lee, Ching-Hwa Liu
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Patent number: 6147467Abstract: A servo loop, including a dynamic compensator, for use in an optical disk player is provided. The optical disk player reproduces data over the optical disk. The pickup head reads data on a data track of the optical disk and generates a feedback signal. The dynamic compensator inputs a feedback signal and outputs a compensation signal after a predetermined transfer function operation over the feedback signal in order to adjust the dynamic response of the servo loop. The servo loop includes a switch, which is responsive to a signal indicative of high spinning rate of the optical disk for selectively outputting the compensation signal. The servo loop includes a device coupled to the switch for selectively transmitting the compensation signal into the servo loop.Type: GrantFiled: August 20, 1999Date of Patent: November 14, 2000Assignee: Asustek Computer, Inc.Inventors: Wen-Hai Yu, Shih-Chieh Lee, Chih-Chen Chen
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Patent number: RE41429Abstract: The invention provides a reliable write method of data on an optical record carrier without changing the conventional configuration of an information recording apparatus. The invention uses the errors occurred in reading ATIP codes and/or the reflected signal from the surface of the record carrier to decide if the storage unit on the record carrier is eligible to store data. The defective storage units are labeled as unrecordable.Type: GrantFiled: November 2, 2005Date of Patent: July 13, 2010Assignee: QISDA CorporationInventors: Meng-Shin Yen, Lester Chen, Shih-Chieh Lee