Patents by Inventor Shihoko ASAI

Shihoko ASAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210288058
    Abstract: A semiconductor memory device according to an embodiment includes a substrate, first members, first conductive layers, and first and second pillars. The substrate includes first and second areas, and block areas. The first conductive layers are split by the first members. The first pillars are provided in an area in which the first area and the block areas overlap. The second pillars are provided in an area in which the second area and the block areas overlap. The second area includes a first sub-area in which the second pillars are periodically arranged in an area that overlaps at least one block area in the block areas. In the first sub-area, at least one second pillar is omitted from the second pillars that are periodically arranged.
    Type: Application
    Filed: January 20, 2021
    Publication date: September 16, 2021
    Applicant: Kioxia Corporation
    Inventors: Takahito NISHIMURA, Takuya NISHIKAWA, Shihoko ASAI
  • Patent number: 10680012
    Abstract: According to one embodiment, there is provided a semiconductor device including a stacked body, a semiconductor columnar member, an insulating film, and a structure. The stacked body is disposed above a semiconductor substrate. In the stacked body, a conductive film and an insulating layer are alternately disposed in a stacking direction. The semiconductor columnar member penetrates the stacked body in the stacking direction. The insulating film surrounds the semiconductor columnar member and penetrates the stacked body in the stacking direction. The structure is disposed in a peripheral circuit region on the semiconductor substrate. The peripheral circuit region is a region including a plurality of circuit blocks. The structure has a plate-shaped portion extending at least between the plurality of circuit blocks.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: June 9, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Shihoko Asai, Hisakazu Matsumori, Yasuko Takechi
  • Publication number: 20200091184
    Abstract: According to one embodiment, there is provided a semiconductor device including a stacked body, a semiconductor columnar member, an insulating film, and a structure. The stacked body is disposed above a semiconductor substrate. In the stacked body, a conductive film and an insulating layer are alternately disposed in a stacking direction. The semiconductor columnar member penetrates the stacked body in the stacking direction. The insulating film surrounds the semiconductor columnar member and penetrates the stacked body in the stacking direction. The structure is disposed in a peripheral circuit region on the semiconductor substrate. The peripheral circuit region is a region including a plurality of circuit blocks. The structure has a plate-shaped portion extending at least between the plurality of circuit blocks.
    Type: Application
    Filed: March 13, 2019
    Publication date: March 19, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Shihoko ASAI, Hisakazu Matsumori, Yasuko Takechi