Abstract: Embodiments of the present disclosure provide a flexible display panel and a manufacturing method thereof, wherein the flexible display panel includes: an array substrate; an organic light emitting layer disposed on the array substrate; a dam disposed on the array substrate and disposed to surround the organic light emitting layer; and an encapsulation layer covering the organic light emitting layer and the dam, wherein the dam comprises a first side surface close to the organic light emitting layer, and a second side surface away from the organic light emitting layer, and the second side surface is disposed with at least one of a groove, a stepped structure, or a sharp corner structure.

Abstract: A computing device includes a processor, at least one storage block, and an access detection unit. The processor includes a load/store unit (LSU). When the processor switches from a program to another program, the LSU stores a return address of the another program to the at least one storage block. The access detection unit includes a store-once stack and a comparison logic circuit. The store-once stack stores a storage address of the return address in the at least one storage block when the at least one storage block stores the return address. Before the LSU performs a storage operation on the at least one storage block, the comparison logic circuit compares a write address of the storage operation with a storage addresses of the return address stored in the store-once stack to determine whether the return address will be modified.

Abstract: The present application discloses a computing system and an associated method. The computing system includes a memory, a master computing device and a slave computing device. The master computing device includes a memory controller and an input-output memory management unit (IOMMU). When the slave computing device accesses a first virtual address, and a first translation lookaside buffer (TLB) of the slave computing device does not store the first virtual address, the first TLB sends a translation request to the IOMMU. The IOMMU traverses page tables of the memory controller to obtain a first physical address corresponding to the first virtual address, selects and clears a first virtual address entry from a second TLB of the computing system according to a recent use time and a dependent workload of each virtual address entry to store the first virtual address and the first physical address.

Abstract: The present application discloses a processing unit and an access detection method thereof. The processing unit includes an execution circuit. The execution circuit connects to a memory and is configured to: execute an access request, wherein the access request is for accessing at least one part of a first physical memory section corresponding to a first access base address; determine whether a first tag of the access request is equal to a second tag corresponding to the first memory base address and whether the at least one part of the first physical memory section matches a first legal access section corresponding to the first memory base address; and determine whether to send an alert message according to the determination result.

Abstract: The present application discloses a processor and an attack detection method thereof. The processor includes a first register and an execution unit. The execution unit is configured to: execute a first jump-related instruction under a first privilege mode; set a first field of the first register to a first jump status parameter according to execution of the first jump-related instruction; jump to a first corresponding instruction in a specified register of the first jump-related instruction; determine whether the first corresponding instruction is a legal instruction and whether a first parameter of the first corresponding instruction is equal to the first jump status parameter to obtain a first determination; and determine whether to send an alert message according to the first determination.

Abstract: A machine learning application method, a device, an electronic apparatus, and a storage medium, used to directly link service scenarios, aggregate data related to the service scenarios, accordingly explore modeling schemes, and ensure that data used in offline modeling scheme exploration and data used in an online model prediction service have the same source, thereby realizing consistency of source of offline and online data. Directly deploying an offline model to an online environment results in data inconsistency between online feature computation and offline feature computation, which in turn causes poor prediction performance; therefore, only a modeling scheme is deployed online, and the offline model is not deployed. After a modeling scheme is deployed online, sample data having a feature and feedback can be obtained by receiving a prediction request, thereby enabling model self-learning by means of the sample data.

Abstract: A mask and methods for making the mask and monitoring mask haze using the mask are provided. The mask includes chip areas that are separated by scribe lanes. A scribe lane includes a monitoring area that contains a primary pattern and an associated assist feature. The assist feature includes two parallel scattering bars. Regions in the monitoring area other than the primary pattern and the associated assist feature are covered with a phase shift layer having a transmittance smaller than that of the primary pattern and the assist feature. When the mask is exposed to a light source, the assist feature is not transferred onto a wafer but cooperates with the primary pattern to generate a primary transferred pattern on the wafer. When a region between the two scattering bars has mask haze thereon, a defect identification pattern is generated on the wafer near the primary transferred pattern following exposure.

Abstract: A mask and methods for making the mask and monitoring mask haze using the mask are provided. The mask includes chip areas that are separated by scribe lanes. A scribe lane includes a monitoring area that contains a primary pattern and an associated assist feature. The assist feature includes two parallel scattering bars. Regions in the monitoring area other than the primary pattern and the associated assist feature are covered with a phase shift layer having a transmittance smaller than that of the primary pattern and the assist feature. When the mask is exposed to a light source, the assist feature is not transferred onto a wafer but cooperates with the primary pattern to generate a primary transferred pattern on the wafer. When a region between the two scattering bars has mask haze thereon, a defect identification pattern is generated on the wafer near the primary transferred pattern following exposure.