Patents by Inventor Shimin Cui

Shimin Cui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11829738
    Abstract: A block frequency of a block in an irreducible loop in computer code is statically determined. The statically determining includes splitting an incoming block mass among multiple loop headers of the irreducible loop to provide an initial mass for the block. A bottom-up traversal and a top-down traversal of a plurality of loops of the computer code including the irreducible loop are iteratively performed to update a mass of the block. The iteratively performing commences with propagating the initial mass of the block to one or more blocks of one or more loops of the plurality of loops and continues with propagating and updating masses of select blocks of the plurality of loops until a predefined point is reached providing a resulting mass for the block. The block frequency of the block is determined using the resulting mass and is to be used in processing associated with the computer code.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: November 28, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeeva Paudel, Shimin Cui
  • Publication number: 20230195434
    Abstract: Code pattern matching is performed within computer code to determine whether the computer code includes an idiom from a predefined set of idioms. Based on determining that the computer code includes the idiom, a set of data items of the idiom to be analyzed is determined. The set of data items is analyzed with respect to one or more corresponding values from the computer code based on a set of constraints defined for the idiom to determine whether the set of data items satisfy one or more predefined conditions for the idiom. Based on the analyzing indicating that the one or more predefined conditions are satisfied, one or more code segments of the computer code including the idiom are replaced with replacement code to provide revised computer code.
    Type: Application
    Filed: December 16, 2021
    Publication date: June 22, 2023
    Inventors: Shimin Cui, Wai Hung Tsang, Hubert Shun Kwan Tong, Wei Huang
  • Publication number: 20230185551
    Abstract: A block frequency of a block in an irreducible loop in computer code is statically determined. The statically determining includes splitting an incoming block mass among multiple loop headers of the irreducible loop to provide an initial mass for the block. A bottom-up traversal and a top-down traversal of a plurality of loops of the computer code including the irreducible loop are iteratively performed to update a mass of the block. The iteratively performing commences with propagating the initial mass of the block to one or more blocks of one or more loops of the plurality of loops and continues with propagating and updating masses of select blocks of the plurality of loops until a predefined point is reached providing a resulting mass for the block. The block frequency of the block is determined using the resulting mass and is to be used in processing associated with the computer code.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 15, 2023
    Inventors: Jeeva Paudel, Shimin Cui
  • Patent number: 11662989
    Abstract: Pointer alignment in a computer programming to obtain information enabling a compiler to optimize program code. Equivalence classes of pointers are collected in a program using a flow-insensitive yet field-sensitive pointer analysis operation iterating through an entire program code of the program. The equivalence classes of pointers, once collected, are mapped to and recorded in an equivalence class mapping table (ECTable). A portion of the collected equivalence classes of pointers are identified, from the ECTable, as pointer candidates for a pointer alignment computation according to a code pattern analysis of each pointer candidate. The code pattern analysis is based on available alignment information, and whether the alignment information would enable a compiler to optimize pointer references of the candidate pointer. The pointer alignment computation is then performed for each identified pointer candidate to obtain the alignment information used to optimize execution of the program.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: May 30, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Shimin Cui
  • Patent number: 11561778
    Abstract: Aspects include executing a first phase that includes injecting instrumentation into program code in response to identifying an inner conditional check in the program code and running the instrumented program with a representative workload. The injecting includes duplicating the inner conditional check and placing a duplicate of the inner conditional check before a respective original nested conditional check in the program code to create an instrumented program. The instrumented program includes a plurality of basic blocks including original basic blocks and a newly added basic block that includes the duplicate of the inner conditional check. The method also includes executing a second phase that includes collecting execution frequency values from counters associated with the basic blocks to form metadata used to make optimization decisions for the program code.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: January 24, 2023
    Assignee: International Business Machines Corporation
    Inventors: Wai Hung Tsang, Ettore Tiotto, Shimin Cui
  • Publication number: 20220405071
    Abstract: Pointer alignment in a computer programming to obtain information enabling a compiler to optimize program code. Equivalence classes of pointers are collected in a program using a flow-insensitive yet field-sensitive pointer analysis operation iterating through an entire program code of the program. The equivalence classes of pointers, once collected, are mapped to and recorded in an equivalence class mapping table (ECTable). A portion of the collected equivalence classes of pointers are identified, from the ECTable, as pointer candidates for a pointer alignment computation according to a code pattern analysis of each pointer candidate. The code pattern analysis is based on available alignment information, and whether the alignment information would enable a compiler to optimize pointer references of the candidate pointer. The pointer alignment computation is then performed for each identified pointer candidate to obtain the alignment information used to optimize execution of the program.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 22, 2022
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Shimin CUI
  • Patent number: 10656925
    Abstract: An illustrative embodiment of a computer-implemented process for managing aliasing constraints, identifies an object to form an identified object, identifies a scope of the identified object to form an identified scope, and assigns a unique value to the identified object within the identified scope. The computer-implemented process further demarcates an entrance to the identified scope, demarcates an exit to the identified scope, optimizes the identified object using a property of the identified scope and associated aliasing information, tracks the identified object state to form tracked state information; and uses the tracked state information to update the identified object.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: May 19, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shimin Cui, Raul E. Silvera
  • Publication number: 20180349117
    Abstract: An illustrative embodiment of a computer-implemented process for managing aliasing constraints, identifies an object to form an identified object, identifies a scope of the identified object to form an identified scope, and assigns a unique value to the identified object within the identified scope. The computer-implemented process further demarcates an entrance to the identified scope, demarcates an exit to the identified scope, optimizes the identified object using a property of the identified scope and associated aliasing information, tracks the identified object state to form tracked state information; and uses the tracked state information to update the identified object.
    Type: Application
    Filed: August 13, 2018
    Publication date: December 6, 2018
    Inventors: Shimin Cui, Raul E. Silvera
  • Patent number: 10101979
    Abstract: An illustrative embodiment of a computer-implemented process for managing aliasing constraints, identifies an object to form an identified object, identifies a scope of the identified object to form an identified scope, and assigns a unique value to the identified object within the identified scope. The computer-implemented process further demarcates an entrance to the identified scope, demarcates an exit to the identified scope, optimizes the identified object using a property of the identified scope and associated aliasing information, tracks the identified object state to form tracked state information; and uses the tracked state information to update the identified object.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: October 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shimin Cui, Raul E. Silvera
  • Patent number: 10095491
    Abstract: Embodiments of the present invention provide a method, system and computer program product for the data splitting of recursive data structures. In one embodiment of the invention, a method for data splitting recursive data structures can be provided. The method can include identifying data objects of a recursive data structure type, such as a linked list, within source code, the recursive data structure type defining multiple different data fields. The method further can include grouping the data objects into some memory pool units, each of which can contain the same number of data objects. Each memory pool unit can be seen as an array of data objects. The method can include data splitting, which could be maximal array splitting in each different memory pool unit. Finally, the method can include three different approaches, including field padding, field padding and field splitting, to handle irregular field sizes in the data structure.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: October 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Roch G. Archambault, Shimin Cui, Stephen Curial, Yaoqing Gao, Raul E. Silvera, Peng Zhao
  • Patent number: 9727319
    Abstract: A method for significantly reducing compilation time of an application program is provided for compiling the program using profile-directed feedback (PDF). The method applies an additional analysis process between a training run of the application program and a whole program compilation of the application. This analysis process examines a PDF profile file(s) produced during the training run and aggregates data from the PDF file to determine a maximum block counter associated with each source file of the application. Only those source files having maximum block counters in a specified top percent of all the source files of the application have their fat binaries included in the whole program compilation.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Corporation
    Inventors: Shimin Cui, William G. O'Farrell, Graham K. Yiu
  • Publication number: 20170220328
    Abstract: A method for significantly reducing compilation time of an application program is provided for compiling the program using profile-directed feedback (PDF). The method applies an additional analysis process between a training run of the application program and a whole program compilation of the application. This analysis process examines a PDF profile file(s) produced during the training run and aggregates data from the PDF file to determine a maximum block counter associated with each source file of the application. Only those source files having maximum block counters in a specified top percent of all the source files of the application have their fat binaries included in the whole program compilation.
    Type: Application
    Filed: October 13, 2016
    Publication date: August 3, 2017
    Inventors: Shimin Cui, William G. O'Farrell, Graham K. Yiu
  • Patent number: 9535673
    Abstract: A method for significantly reducing compilation time of an application program is provided for compiling the program using profile-directed feedback (PDF). The method applies an additional analysis process between a training run of the application program and a whole program compilation of the application. This analysis process examines a PDF profile file(s) produced during the training run and aggregates data from the PDF file to determine a maximum block counter associated with each source file of the application. Only those source files having maximum block counters in a specified top percent of all the source files of the application have their fat binaries included in the whole program compilation.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Shimin Cui, William G. O'Farrell, Graham K. Yiu
  • Patent number: 9424011
    Abstract: A computer-implemented method, carried out by one or more processors, for recursive expression reduction. In an embodiment, the method comprises the steps of identifying a candidate loop, where the candidate loop includes at least one or more reduction variables and reduction operations; altering grouping of loop invariants and loop variants within the candidate loop; and performing recursive expression simplification for an inner loop, wherein the inner loop is located within the candidate loop.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: August 23, 2016
    Assignee: International Business Machines Corporation
    Inventors: Shimin Cui, Yaoqing Gao
  • Patent number: 9405516
    Abstract: A computer-implemented method, carried out by one or more processors, for recursive expression reduction. In an embodiment, the method comprises the steps of identifying a candidate loop, where the candidate loop includes at least one or more reduction variables and reduction operations; altering grouping of loop invariants and loop variants within the candidate loop; and performing recursive expression simplification for an inner loop, wherein the inner loop is located within the candidate loop.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: August 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Shimin Cui, Yaoqing Gao
  • Patent number: 9311065
    Abstract: Embodiments relate to data splitting for multi-instantiated objects. An aspect includes receiving a portion of source code for compilation having a dynamic object to split using object size array data splitting. Another aspect includes replacing all memory allocations for the dynamic object with a total size of an object size array and object field arrays including a predetermined padding. Another aspect includes inserting statements in the source code after the memory allocations to populate the object size array with a value of a number of elements of the object size array. Another aspect includes updating a stride for load and store operations using dynamic pointers. Yet another aspect includes modifying field references by adding a distance between the object size array and the object field array to respective address operations.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: April 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: Shimin Cui, Yan Zhang
  • Patent number: 9298630
    Abstract: A computer processor collects information for a dominant data access loop and reference code patterns based on data reference pattern analysis, and for pointer aliasing and data shape based on pointer escape analysis. The computer processor selects a candidate array for data splitting wherein the candidate array is referenced by a dominant data access loop. The computer processor determines a data splitting mode by which to split the data of the candidate array, based on the reference code patterns, the pointer aliasing, and the data shape information, and splits the data into two or more split arrays. The computer processor creates a software cache that includes a portion of the data of the two or more split arrays in a transposed format, and maintains the portion of the transposed data within the software cache and consults the software cache during an access of the split arrays.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: March 29, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Christopher M. Barton, Shimin Cui, Satish K. Sadasivam, Raul E. Silvera, Madhavi G. Valluri, Steven W White
  • Publication number: 20150331682
    Abstract: Embodiments of the present invention provide a method, system and computer program product for the data splitting of recursive data structures. In one embodiment of the invention, a method for data splitting recursive data structures can be provided. The method can include identifying data objects of a recursive data structure type, such as a linked list, within source code, the recursive data structure type defining multiple different data fields. The method further can include grouping the data objects into some memory pool units, each of which can contain the same number of data objects. Each memory pool unit can be seen as an array of data objects. The method can include data splitting, which could be maximal array splitting in each different memory pool unit. Finally, the method can include three different approaches, including field padding, field padding and field splitting, to handle irregular field sizes in the data structure.
    Type: Application
    Filed: July 28, 2015
    Publication date: November 19, 2015
    Inventors: Roch G. Archambault, Shimin Cui, Stephen Curial, Yaoqing Gao, Raul E. Silvera, Peng Zhao
  • Publication number: 20150277871
    Abstract: A computer-implemented method, carried out by one or more processors, for recursive expression reduction. In an embodiment, the method comprises the steps of identifying a candidate loop, where the candidate loop includes at least one or more reduction variables and reduction operations; altering grouping of loop invariants and loop variants within the candidate loop; and performing recursive expression simplification for an inner loop, wherein the inner loop is located within the candidate loop.
    Type: Application
    Filed: April 1, 2014
    Publication date: October 1, 2015
    Applicant: International Business Machines Corporation
    Inventors: Shimin Cui, Yaoqing Gao
  • Publication number: 20150277873
    Abstract: A computer-implemented method, carried out by one or more processors, for recursive expression reduction. In an embodiment, the method comprises the steps of identifying a candidate loop, where the candidate loop includes at least one or more reduction variables and reduction operations; altering grouping of loop invariants and loop variants within the candidate loop; and performing recursive expression simplification for an inner loop, wherein the inner loop is located within the candidate loop.
    Type: Application
    Filed: January 23, 2015
    Publication date: October 1, 2015
    Inventors: Shimin Cui, Yaoqing Gao