Abstract: The present application discloses a display panel, a manufacturing method thereof, and a display device. The display panel includes a substrate; a gate layer; a gate insulating layer; an active layer; a source-drain layer including a source electrode and a drain electrode; a passivation layer provided with a contact hole; and a pixel electrode layer connected to the drain electrode through the contact hole; wherein a light-transmitting etch stop layer is disposed at a hole bottom of the contact hole, and the light-transmitting etch stop layer at least partially covers a hole bottom of the contact hole.

Abstract: A driving circuit and a driving method of a display panel are provided. The driving circuit includes scan lines, data lines, a driving circuit unit, and a light emitting diode. The driving circuit unit includes a first driving circuit unit and a second driving circuit unit. The first driving circuit unit and the second driving circuit unit are periodically and alternately driven to operate to power the light emitting diode. This solves issues of self-heating and low stability of thin film transistors and improves a display performance of the display panel.

Abstract: The invention provides an array substrate and a manufacturing method thereof. The array substrate comprises a substrate body, a common electrode, a light shield layer, an insulating layer, a polycrystalline silicon layer, a gate insulating layer, a gate electrode, a medium layer and a source-drain electrode. The array substrate is characterized in that the common electrode is formed on the substrate body, the light shield layer is positioned on the common electrode, the insulating layer is positioned on the light shield layer and the common electrode, and the gate electrode is connected with the common electrode through a through hole.

Abstract: A manufacturing method of a fringe field switching (FFS) array substrate is provided. The method has steps of: forming gate electrodes and common electrodes on a glass substrate, wherein the gate electrodes are formed on a portion of the common electrodes; forming semiconductor active layer precursors and pixel electrode precursors; and executing an ion implantation process for two ends of each of the semiconductor active layer precursors which are uncovered by a photoresist layer, so as to transform they into transparent conductors; and finally forming source electrodes and drain electrodes.

Abstract: The invention provides an array substrate and a manufacturing method thereof. The array substrate comprises a substrate body, a common electrode, a light shield layer, an insulating layer, a polycrystalline silicon layer, a gate insulating layer, a gate electrode, a medium layer and a source-drain electrode. The array substrate is characterized in that the common electrode is formed on the substrate body, the light shield layer is positioned on the common electrode, the insulating layer is positioned on the light shield layer and the common electrode, and the gate electrode is connected with the common electrode through a through hole.

Abstract: A dual-gate TFT (thin film transistor) array substrate and a manufacturing method thereof are provided. A source electrode and a drain electrode are formed on a common electrode layer; and a common electrode of the common electrode layer, the source electrode and the drain electrode can simultaneously be formed by one mask during manufacturing. Therefore, the dual-gate TFT array substrate and the manufacturing method thereof have beneficial effects to reduce the number of masks, shorten the process, and improve the manufacturing efficiency.

Abstract: A method for manufacturing a dual gate oxide semiconductor TFT substrate utilizes a halftone mask to implement a photo process, which not only accomplishes patterning to an oxide semiconductor layer but also obtains an oxide conductor layer with ion doping. The method implements patterning to a bottom gate isolation layer and a top gate isolation layer at the same time with one photolithographic process. The method implements patterning to second and third metal layers at the same time to obtain a first source, a first drain, a second source, a second drain, a first top gate and a second top gate with one photolithographic process. The method implements patterning to a second flat layer, a passivation layer and a top gate isolation layer at the same time with one photolithographic process. The number of photolithographic processes involved is reduced to nine so as to simplify the manufacturing process.

Abstract: The present invention provides a manufacture method of an oxide semiconductor TFT substrate and a structure thereof. The manufacture method of the dual gate oxide semiconductor TFT substrate utilizes the halftone mask to implement one photo process, which cannot only accomplish the patterning to the oxide semiconductor layer but also obtain the oxide conductor layer (52?) with ion doping process, and the oxide conductor layer (52?) is employed as being the pixel electrode of the LCD to replace the ITO pixel electrode in prior art; the method manufactures the source (81), the drain (82) and the top gate (71) at the same time with one photo process; the method implements patterning process to the passivation layer (8) and the top gate isolation layer (32) together with one photo process, to reduce the number of the photo processes to nine for shortening the manufacture procedure, raising the production efficiency and lowering the production cost.

Abstract: The present invention provides a flexible OLED and a manufacture method thereof. The flexible OLED is capable of decreasing the resistance of the second electrode (12) and increasing the conducting ability to even the voltages of respective pixels, to improve the display homogeneity, and meanwhile, capable of reducing the thickness of the second electrode (12) and saving the material of the second electrode (12) by covering the auxiliary conducting layer (13) on the second electrode (12). The manufacture method of the flexible OLED is capable of decreasing the resistance of the second electrode (12) and increasing the conducting ability to even the voltages of respective pixels, to improve the display homogeneity, and meanwhile, capable of reducing the thickness of the second electrode (12) and saving the material of the second electrode (12) by forming the auxiliary conducting layer (13) on the second electrode (12) to cover the second electrode (12).

Abstract: A dual-gate TFT (thin film transistor) array substrate and a manufacturing method thereof are provided. A source electrode and a drain electrode are formed on a common electrode layer; and a common electrode of the common electrode layer, the source electrode and the drain electrode can simultaneously be formed by one mask during manufacturing. Therefore, the dual-gate TFT array substrate and the manufacturing method thereof have beneficial effects to reduce the number of masks, shorten the process, and improve the manufacturing efficiency.

Abstract: An FFS mode array substrate and a manufacturing method thereof are provided. The FFS mode array substrate has: a second insulation layer deposited on a base layer, wherein a first through hole and a second through hole are formed in the second insulation layer; a pixel electrode layer deposited on the second insulation layer, wherein the pixel electrode layer is provided with a plurality of pixel electrodes; and a third insulation layer formed on a source electrode, a drain electrode, the pixel electrodes, and the second insulation layer.

Abstract: A method for manufacturing a dual gate oxide semiconductor TFT substrate utilizes a halftone mask to implement a photo process, which not only accomplishes patterning to an oxide semiconductor layer but also obtains an oxide conductor layer with ion doping. The method implements patterning to a bottom gate isolation layer and a top gate isolation layer at the same time with one photolithographic process. The method implements patterning to second and third metal layers at the same time to obtain a first source, a first drain, a second source, a second drain, a first top gate and a second top gate with one photolithographic process. The method implements patterning to a second flat layer, a passivation layer and a top gate isolation layer at the same time with one photolithographic process. The number of photolithographic processes involved is reduced to nine so as to simplify the manufacturing process.

Abstract: A dual gate oxide semiconductor thin-film transistor (TFT) substrate includes a substrate; a bottom gate positioned on the substrate; a bottom gate isolation layer positioned on the substrate and the bottom gate; a first oxide semiconductor layer positioned on the bottom gate isolation layer above the bottom gate; an oxide conductor layer positioned on the bottom gate isolation layer at one side of the first oxide semiconductor layer; a top gate isolation layer positioned on the first oxide semiconductor layer, the oxide conductor layer, and the bottom gate isolation layer; a top gate positioned on the top gate isolation layer above a middle part of the first oxide semiconductor layer; a source and a drain positioned on the top gate isolation layer at two sides of the top gate; and a passivation layer positioned on the top gate isolation layer, the source, the drain, and the top gate.

Abstract: An FFS mode array substrate and a manufacturing method thereof are provided. The FFS mode array substrate has: a glass substrate provided with a gate electrode thereon; a first insulation layer; a semiconductor layer having a channel region and a common electrode region to form a channel semiconductor layer on the channel region of the semiconductor layer, and form a common electrode layer on the common electrode region of the semiconductor layer by doping semiconductor thereon; and a second insulation layer provided with a first through hole and a second through hole therein.

Abstract: A dual gate oxide semiconductor TFT substrate is made by utilizing a halftone mask to implement one photo process, which accomplishes patterning of an oxide semiconductor layer and forms an oxide conductor layer with ion doping process. Patterning of a bottom gate isolation layer and a top gate isolation layer are performed at the same time with one photo process. A first top gate, a first source, a first drain, a second top gate, a second source, and a second drain are formed at the same time with one photo process. Patterning of a flat layer, a passivation layer, and a top gate isolation layer are performed at the same time with one photo process. As such, the number of photo processes applied to manufacture the TFT substrate is reduced to five and the manufacturing process is shortened to thereby raise the production efficiency and lower the production cost.

Abstract: An FFS mode array substrate and a manufacturing method thereof are provided. The FFS mode array substrate has: a glass substrate provided with a gate electrode thereon; a first insulation layer; a semiconductor layer having a channel region and a common electrode region to form a channel semiconductor layer on the channel region of the semiconductor layer, and form a common electrode layer on the common electrode region of the semiconductor layer by doping semiconductor thereon; and a second insulation layer provided with a first through hole and a second through hole therein.

Abstract: A TFT array substrate and the manufacturing method are disclosed, one masking process is adopted to etch the first metal oxide semiconductor layer to be the first semiconductor pattern and the second semiconductor pattern. Afterward, a doping process is applied to the first semiconductor pattern and the second semiconductor pattern. Two ends of the first semiconductor pattern are processed to be a first conductor pattern and a second conductor pattern spaced apart from each other. In addition, the second semiconductor pattern is processed to be a common electrode. The remaining first semiconductor pattern is above the bottom gate electrode. In this way, the number of masking processes adopted during the manufacturing process of the array substrate is decreased, such that the manufacturing efficiency is enhanced and the manufacturing cost is reduced.

Abstract: The present invention provides a manufacture method of an oxide semiconductor TFT substrate and a structure thereof.

Abstract: A dual gate oxide semiconductor TFT substrate is made by utilizing a halftone mask to implement one photo process, which accomplishes patterning of an oxide semiconductor layer and forms an oxide conductor layer with ion doping process. Patterning of a bottom gate isolation layer and a top gate isolation layer are performed at the same time with one photo process. A first top gate, a first source, a first drain, a second top gate, a second source, and a second drain are formed at the same time with one photo process. Patterning of a flat layer, a passivation layer, and a top gate isolation layer are performed at the same time with one photo process. As such, the number of photo processes applied to manufacture the TFT substrate is reduced to five and the manufacturing process is shortened to thereby raise the production efficiency and lower the production cost.

Abstract: The TFT array substrate and the manufacturing method thereof are disclosed. The dual-layer structure having the bottom gate electrode, including the metal layer and the transparent metal oxide layer, and the common electrode, including the common electrode, may be formed by the same masking process. In this way, the number of masking processes may be decreased so as to enhance the manufacturing efficiency and the cost.