Patents by Inventor Shimon Muller

Shimon Muller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7529245
    Abstract: A reorder mechanism for use with a relaxed order interconnect device. The reorder mechanism includes a buffer module and a reorder module coupled to the buffer module is disclosed. The reorder module enables movement of multiple packets between a plurality of resources. The movement of multiple packets of information has a relaxed ordering of data transfers associated with multiple packets and also a relaxed ordering of data transfers associated with any single packet.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: May 5, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Rahoul Puri, Michael Wong
  • Patent number: 7443878
    Abstract: A method for scaling a network system which includes providing at least one network interface and providing a flexible association between packets and a plurality of processing entities via the plurality of memory access channels. Each network interface including a plurality of memory access channels.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: October 28, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Ariel Hendel, Michael Wong, Yatin Gajjar, Shimon Muller
  • Patent number: 7415035
    Abstract: A method for providing access to a network interface having a plurality of memory access channels is disclosed. The network interface provides access to a plurality of processing entities. The method includes providing a network interface software hierarchy wherein the network interface software hierarchy provides access to the network interface, and associating various memory access channels with corresponding processing entities via the network interface software hierarchy so as to provide a virtualized network interface.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: August 19, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Ariel Hendel, Yatin Gajjar, Michael Wong
  • Patent number: 7415034
    Abstract: A network system having a plurality of processing partitions which includes a network interface unit coupled to a plurality of processing entities is disclosed. The network interface unit includes a plurality of memory access channels. The plurality of memory access channels is virtualized. The network interface unit is shared among the plurality of processing partitions.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: August 19, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Ariel Hendel, Yatin Gajjar, Michael Wong
  • Patent number: 7353360
    Abstract: A method for maximizing page locality within a networking system operationally attached to a plurality of processing entities wherein each processing entity either shares or includes a corresponding memory hierarchy wherein each memory hierarchy has a table of pages temporally managed by access from the networking system is disclosed. The method includes providing at least one memory access channel to each memory hierarchy and moving information to and from pages in the memory hierarchy of a particular processing entity via its associated memory access channels.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: April 1, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Rahoul Puri, Michael Wong
  • Publication number: 20060251109
    Abstract: A network system which includes a plurality of processing entities, an interconnect device coupled to the plurality of processing entities, a memory system coupled to the interconnect device and the plurality of processing entities, a network interface unit coupled to the plurality of processing entities and the memory system via the interconnect device. The network interface includes a memory access module and a packet classifier. The memory access module includes a plurality of parallel memory access channels. The packet classifier provides a flexible association between packets and the plurality of processing entities via the plurality of memory access channels.
    Type: Application
    Filed: April 5, 2005
    Publication date: November 9, 2006
    Inventors: Shimon Muller, Ariel Hendel, Yatin Gajjar, Michael Wong, Rahoul Puri, May Lin
  • Publication number: 20060251108
    Abstract: A method for scaling a network system which includes providing at least one network interface and providing a flexible association between packets and a plurality of processing entities via the plurality of memory access channels. Each network interface including a plurality of memory access channels.
    Type: Application
    Filed: April 4, 2005
    Publication date: November 9, 2006
    Inventors: Ariel Hendel, Michael Wong, Yatin Gajjar, Shimon Muller
  • Publication number: 20060221990
    Abstract: A method for addressing system latency within a network system which includes providing a network interface and moving data within each of the plurality of memory access channels independently and in parallel to and from a memory system so that one or more of the plurality of memory access channels operate efficiently in the presence of arbitrary memory latencies across multiple requests is disclosed. The network interface includes a plurality of memory access channels.
    Type: Application
    Filed: April 4, 2005
    Publication date: October 5, 2006
    Inventors: Shimon Muller, Rahoul Puri, Michael Wong
  • Publication number: 20060221832
    Abstract: A network system having a plurality of processing partitions which includes a network interface unit coupled to a plurality of processing entities is disclosed. The network interface unit includes a plurality of memory access channels. The plurality of memory access channels is virtualized. The network interface unit is shared among the plurality of processing partitions.
    Type: Application
    Filed: April 4, 2005
    Publication date: October 5, 2006
    Inventors: Shimon Muller, Ariel Hendel, Yatin Gajjar, Michael Wong
  • Patent number: 6873630
    Abstract: An Ethernet architecture is provided for connecting a computer system or other network entity to a dedicated Ethernet network medium. The network interface enables the transmission and receipt of data by striping individual Ethernet frames across a plurality of logical channels and may thus operate at substantially the sum of the individual channel rates. Each channel may be conveyed by a separate conductor (e.g., in a bundle) or the channels may be carried simultaneously on a shared medium (e.g., an electrical or optical conductor that employs a form of multiplexing). On a sending station, a distributor within the sender's network interface receives Ethernet frames (e.g., from a MAC) and distributes frame bytes in a round-robin fashion on the plurality of channels. Each “mini-frame” is separately framed and encoded for transmission across its channel. On a receiving station, the receiver's network interface includes a collector for collecting the multiple mini-frames (e.g.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: March 29, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Ariel Hendel
  • Patent number: 6816467
    Abstract: A method and apparatus for providing spanning tree support are provided. According to one aspect of the present invention, a network device includes two or more ports that are part of a trunk. One of the two or more ports are selected for participation in a loop-free topology discovery protocol. Then, the loop-free topology discovery protocol is executed for the selected port. If the loop-free topology discovery protocol indicates the selected port is to be blocked, then all of the ports of the trunk are blocked. According to another aspect of the present invention, a set of states for association with each port of a network device is provided. The set of states includes a “blocked” state in which both learning and forwarding are inhibited, a “learn only” state in which learning is permitted and forwarding remains inhibited, and a “non-blocked” state in which both learning and forwarding are permitted.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: November 9, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Ariel Hendel
  • Patent number: 6650640
    Abstract: A system and method are provided for managing information concerning a network flow comprising packets sent from a source entity to a destination entity served by a network interface. A network flow is established for each datagram sent from the source entity to the destination entity. A flow key, identifying the source and destination entities, is stored in a data structure along with information concerning validity of the flow, sequence of data in the flow datagram and how recently the flow was active. Once a flow is established, it is updated each time a packet containing data from the flow's datagram is received. When such a packet is received, an operation code is generated for identifying whether the packet is suitable for a particular network interface function. An operation code may, for example, indicate that a packet contains data to be re-assembled with other data from the same flow. Another operation code may indicate that a packet is not suitable for data re-assembly.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: November 18, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Denton E. Gentry, Jr.
  • Patent number: 6606301
    Abstract: A high performance network interface receives network traffic in the form of packets. Prior to being transferred to a host computer, a packet is stored in a packet queue. A system and method are provided for randomly discarding a packet if the rate of packet transfers cannot keep pace with the rate of packet arrivals at the queue. When a packet must be dropped a selected packet may be discarded as it arrives at the queue, or a packet already in the queue may be dropped. A packet queue is apportioned into multiple regions, any of which may overlap or share a common boundary. A probability indicator is associated with a region to specify the probability of a packet being discarded when the level of traffic stored in the queue is within the region. A counter may be employed in conjunction with a probability indicator to identify individual packets. Probability indicators may differ from region to region so that the probability of discarding a packet fluctuates as the level of traffic stored in the queue changes.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: August 12, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Linda T. Cheng, Denton E. Gentry, Jr.
  • Patent number: 6483804
    Abstract: A system and method are provided for identifying related packets in a communication flow for the purpose of collectively processing them through a protocol stack comprising one or more protocols under which the packets were transmitted. A packet received at a network interface is parsed to retrieve information from one or more protocol headers. A flow key is generated to identify a communication flow that includes the packet, and is stored in a database of flow keys. When the packet is placed in a queue to be transferred to a host computer, the flow key and/or its flow number (e.g., its index into the database) is stored in a separate queue. Near to the time at which the packet is transferred to the host computer, a dynamic packet batching module searches for a packet that is related to the packet being transferred (i.e., is in the same flow) but which will be transferred later in time.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: November 19, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Denton E. Gentry, Jr.
  • Patent number: 6480489
    Abstract: A system and method are provided for transferring a packet received from a network to a host computer according to an operation code associated with the packet. A packet received at a network interface is parsed to retrieve information from a header portion of the packet. A flow key is generated for a received packet that was formatted with one of a set of predetermined protocols. A packet's flow key identifies a communication flow that comprises the packet. Based on some of the retrieved information, a code is associated with the packet to inform a transfer engine how the packet should be transferred to host memory. Based on a packet's code, the transfer engine stores the packet in one or more host memory buffers. If the packet was formatted with one of the set of predetermined protocols, its data is re-assembled in a re-assembly buffer with data from other packets in the same communication flow. Re-assembled data may be provided to a destination application or user through page flipping.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: November 12, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Denton E. Gentry, Jr., Linda T. Cheng, John E. Watkins
  • Patent number: 6453360
    Abstract: A high performance network interface is provided for receiving a packet from a network and transferring it to a host computer system. A header portion of a received packet is parsed by a parser module to determine the packet's compatibility with, or conformance to, one or more pre-selected protocols. If compatible, a number of processing functions may be performed to increase the efficiency with which the packet is handled. In one function, a re-assembly engine re-assembles, in a re-assembly buffer, data portions of multiple packets in a single communication flow or connection. Header portions of such packets are stored in a header buffer. An incompatible packet may be stored in another buffer. In another function, a packet batching module determines when multiple packets in one flow are transferred to the host computer system, so that their header portions are processed collectively rather than being interspersed with headers of other flows' packets.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: September 17, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Denton E. Gentry, Jr., John E. Watkins, Linda T. Cheng
  • Patent number: 6389468
    Abstract: A system and method are provided for distributing or sharing the processing of network traffic (e.g., through a protocol stack on a host computer system) received at a multiprocessor computer system. A packet formatted according to one or more communication protocols is received from a network entity at a network interface circuit of a multiprocessor computer. A header portion of the packet is parsed to retrieve information stored in one or more protocol headers, such as source and destination identifiers or a virtual communication connection identifier. In one embodiment, a source identifier and a destination identifier are combined to form a flow key that is subjected to a hash function. The modulus of the result of the hash function over the number of processors in the multiprocessor computer is then calculated. In another embodiment a modulus operation is performed on the packet's virtual communication connection identifier.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: May 14, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Denton E. Gentry, Jr.
  • Patent number: 6298360
    Abstract: A random number generator, useful in association with a computer system of a computer network, generates a randomly distributed back-off time interval between a collision and the retransmission of the packet, e.g. for Ethernet's collision sense multiple access/collision detect (CSMA/CD) protocol. The random number generator includes a data-based number generator, a timer-based number generator and a number combiner. The combiner is provided the output numbers from data-based and timer-based number generators, and in turn generates a random number. A user selectable initialization number is provided as a seed number for the data-based number generator. Subsequently, a cyclic redundency check (CRC) generator provides numbers for data-based number generator. A free-running timer provides numbers for the timer-based number generator. The user selectable initialization number is also provided as a seed number for the data-based and timer-base generators.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: October 2, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Shimon Muller
  • Patent number: 6246680
    Abstract: An architecture for a highly integrated network element building block is provided. According to one aspect of the present invention, a network device building block includes a network interface with multiple ports for transmitting and receiving packets over a network. The network device building block also includes a packet buffer storage which is coupled to the network interface. The packet buffer storage acts as an elasticity buffer for adapting between incoming and outgoing bandwidth requirements. A shared memory manager may also be provided dynamically allocate and deallocate buffers in the packet buffer storage on behalf of the network interface and other clients of the packet buffer storage. The network device building block further includes a switch fabric which is coupled to the network interface. The switch fabric provides forwarding decisions for received packets. A given forwarding decision includes a list of ports upon which a particular received packet is to be forwarded.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: June 12, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Shimon Muller, Ariel Hendel, Howard Frazier
  • Patent number: RE38309
    Abstract: CSMA/CD is used to implement flow control in a full-duplex Ethernet network in a lossless fashion. Uniquely identifiable flow control transmit on/off (“XON/XOFF”) messages are transmitted, preferably during IPG, by a receiving station about to be congested to the transmitting station whose data output is to be controlled. The transmitting station physical layer receives and decodes these messages. If XOFF is recognized, the transmitting station continuously asserts CRS to its MAC layer at the MII, regardless of the prior CRS current state. CRS is continuously asserted until the receiving station transmits an XON flow control signal, indicating its ability to accept further data. During CRS assertion, the transmitting station defers transmission, e.g., is flow controlled.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: November 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Howard M. Frazier, Shimon Muller