Patents by Inventor Shimpei AOKI

Shimpei AOKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240371657
    Abstract: A mounting device mounts a chip component having a chip recognition mark and a substrate having a substrate recognition mark. An attachment tool has transparency and has a tool recognition mark. The attachment tool holds a surface of the chip component opposite to a surface having the chip recognition mark. A chip position recognition unit simultaneously acquires position information of the chip recognition mark and of the tool recognition mark. The substrate position recognition unit acquires position information of the substrate recognition mark and of the tool recognition mark. A control unit moves a substrate stage holding the substrate or the attachment tool in the in-plane direction of the substrate on the basis of information obtained by the chip position recognition unit and by the substrate position recognition unit to perform alignment between the chip component and the substrate.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Shimpei AOKI, Takashi HARE, Kenji HAMAKAWA, Katsumi TERADA
  • Publication number: 20210129456
    Abstract: A fiber bundle affixing device comprises an affixing head configured to affix fiber bundles that have been cut in advance to a predetermined length, one by one to an affixing surface under heating and/or pressure. The affixing head includes a heater configured to heat the fiber bundles and/or the affixing surface, and a feeder configured to hold and/or convey only one fiber bundle that is being affixed by the affixing head during an affixing operation of affixing the fiber bundles by the affixing head.
    Type: Application
    Filed: March 2, 2018
    Publication date: May 6, 2021
    Inventors: Jun INAGAKI, Shimpei AOKI, Toshifumi TAKEGAMI, Masato SUGAMORI, Kimihiko HATTORI, Hideo MATSUOKA
  • Patent number: 10181460
    Abstract: A method for manufacturing a semiconductor device includes laminating a plurality of semiconductor wafers via an adhesive, heating such that the adhesive reaches a specific viscosity, and pressing the semiconductor wafers under a provisional pressure bonding load such that a gap between solder of through-electrodes provided to chip parts and through-electrodes of an adjacent semiconductor wafer falls within a specific range that is greater than zero, to produce a provisional pressure-bonded laminate; cutting the provisional pressure-bonded laminate with a cutter to produce a provisional pressure-bonded laminate chip part; and heating the provisional pressure-bonded laminate chip part to at least curing temperature of the adhesive and at least melting point of the solder, and pressing the provisional pressure-bonded laminate chip part under a main pressure bonding load to produce a main pressure-bonded laminate chip part such that the solder comes into contact with the through-electrodes of adjacent chip parts
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: January 15, 2019
    Assignee: TORAY ENGINEERING CO., LTD.
    Inventors: Noboru Asahi, Yoshiyuki Arai, Yoshinori Miyamoto, Shimpei Aoki, Masatsugu Nimura
  • Publication number: 20180096980
    Abstract: A method for manufacturing a semiconductor device includes laminating a plurality of semiconductor wafers via an adhesive, heating such that the adhesive reaches a specific viscosity, and pressing the semiconductor wafers under a provisional pressure bonding load such that a gap between solder of through-electrodes provided to chip parts and through-electrodes of an adjacent semiconductor wafer falls within a specific range that is greater than zero, to produce a provisional pressure-bonded laminate; cutting the provisional pressure-bonded laminate with a cutter to produce a provisional pressure-bonded laminate chip part; and heating the provisional pressure-bonded laminate chip part to at least curing temperature of the adhesive and at least melting point of the solder, and pressing the provisional pressure-bonded laminate chip part under a main pressure bonding load to produce a main pressure-bonded laminate chip part such that the solder comes into contact with the through-electrodes of adjacent chip parts
    Type: Application
    Filed: March 29, 2016
    Publication date: April 5, 2018
    Inventors: Noboru ASAHI, Yoshiyuki ARAI, Yoshinori MIYAMOTO, Shimpei AOKI, Masatsugu NIMURA